[binutils-gdb/binutils-2_31-branch] Arm: Fix disassembler crashing on -b binary when thumb file and thumb not forced.

[Tamar Christina <tnfchris at sourceware dot org>]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f9369f95fb2dbeea186b0cafb27775b92fced4b9

commit f9369f95fb2dbeea186b0cafb27775b92fced4b9
Author: Tamar Christina <tamar.christina@arm.com>
Date:   Fri Oct 19 10:31:42 2018 +0100

    Arm: Fix disassembler crashing on -b binary when thumb file and thumb not forced.
    
    The disassembler for Arm has some aborts in it in places it assumes can never
    be reached.  Under normal circumstances they indeed cannot be reached because
    the right options are selected from the ARM attributes in the ELF file.
    
    However when disassembling with -b binary then if you do not get the options
    right the disassembler just aborts.  This changes it so it just prints how it
    was trying to interpret the instruction and prints UNKNOWN instructions next to it.
    
    This way the user has an idea of what's going.
    
    gas/ChangeLog:
    
    	* testsuite/gas/arm/undefined-insn-arm.d: New test.
    	* testsuite/gas/arm/undefined-insn-thumb.d: New test.
    	* testsuite/gas/arm/undefined-insn.s: New test.
    
    opcodes/ChangeLog:
    
    	* arm-dis.c (UNKNOWN_INSTRUCTION_32BIT): Format specifier for arm mode.
    	(UNKNOWN_INSTRUCTION_16BIT): Format specifier for thumb mode.
    	(print_insn_arm, print_insn_thumb16, print_insn_thumb32): Use them.
    
    (cherry picked from commit 0b347048e7e33070212a408dc2371075ee60b556)

Diff:
---
 gas/ChangeLog                                |  6 ++++++
 gas/testsuite/gas/arm/undefined-insn-arm.d   |  5 +++++
 gas/testsuite/gas/arm/undefined-insn-thumb.d |  5 +++++
 gas/testsuite/gas/arm/undefined-insn.s       |  1 +
 opcodes/ChangeLog                            |  6 ++++++
 opcodes/arm-dis.c                            | 11 ++++++++---
 6 files changed, 31 insertions(+), 3 deletions(-)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 4944f89..3708828 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2018-10-19  Tamar Christina  <tamar.christina@arm.com>
+
+	* testsuite/gas/arm/undefined-insn-arm.d: New test.
+	* testsuite/gas/arm/undefined-insn-thumb.d: New test.
+	* testsuite/gas/arm/undefined-insn.s: New test.
+
 2018-10-16  Matthew Malcomson  <matthew.malcomson@arm.com>
 
 	* testsuite/gas/aarch64/illegal-dotproduct.d: New test.
diff --git a/gas/testsuite/gas/arm/undefined-insn-arm.d b/gas/testsuite/gas/arm/undefined-insn-arm.d
new file mode 100644
index 0000000..f779b2a
--- /dev/null
+++ b/gas/testsuite/gas/arm/undefined-insn-arm.d
@@ -0,0 +1,5 @@
+#name: Undefined binary printing in arm mode
+#skip: *-unknown-pe *-*-vxworks
+#source: undefined-insn.s
+#objdump: -D -b binary -m armv5te
+#...
diff --git a/gas/testsuite/gas/arm/undefined-insn-thumb.d b/gas/testsuite/gas/arm/undefined-insn-thumb.d
new file mode 100644
index 0000000..cee74e0
--- /dev/null
+++ b/gas/testsuite/gas/arm/undefined-insn-thumb.d
@@ -0,0 +1,5 @@
+#name: Undefined binary printing in thumb mode
+#skip: *-unknown-pe *-*-vxworks
+#source: undefined-insn.s
+#objdump: -D -b binary -m armv5te -M force-thumb
+#...
diff --git a/gas/testsuite/gas/arm/undefined-insn.s b/gas/testsuite/gas/arm/undefined-insn.s
new file mode 100644
index 0000000..cf59a03
--- /dev/null
+++ b/gas/testsuite/gas/arm/undefined-insn.s
@@ -0,0 +1 @@
+	.inst 0xffffffff
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index bf533f4..8f89565 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2018-10-19  Tamar Christina  <tamar.christina@arm.com>
+
+	* arm-dis.c (UNKNOWN_INSTRUCTION_32BIT): Format specifier for arm mode.
+	(UNKNOWN_INSTRUCTION_16BIT): Format specifier for thumb mode.
+	(print_insn_arm, print_insn_thumb16, print_insn_thumb32): Use them.
+
 2018-10-16  Matthew Malcomson  <matthew.malcomson@arm.com>
 
 	* aarch64-opc.c (struct operand_qualifier_data): Change qualifier data
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index b6cccc5..bc97bc2 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -141,6 +141,8 @@ enum opcode_sentinel_enum
 } opcode_sentinels;
 
 #define UNDEFINED_INSTRUCTION      "\t\t; <UNDEFINED> instruction: %0-31x"
+#define UNKNOWN_INSTRUCTION_32BIT  "\t\t; <UNDEFINED> instruction: %08x"
+#define UNKNOWN_INSTRUCTION_16BIT  "\t\t; <UNDEFINED> instruction: %04x"
 #define UNPREDICTABLE_INSTRUCTION  "\t; <UNPREDICTABLE>"
 
 /* Common coprocessor opcodes shared between Arm and Thumb-2.  */
@@ -5188,7 +5190,8 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
 	  return;
 	}
     }
-  abort ();
+  func (stream, UNKNOWN_INSTRUCTION_32BIT, (unsigned)given);
+  return;
 }
 
 /* Print one 16-bit Thumb instruction from PC on INFO->STREAM.  */
@@ -5459,7 +5462,8 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given)
       }
 
   /* No match.  */
-  abort ();
+  func (stream, UNKNOWN_INSTRUCTION_16BIT, (unsigned)given);
+  return;
 }
 
 /* Return the name of an V7M special register.  */
@@ -6083,7 +6087,8 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
       }
 
   /* No match.  */
-  abort ();
+  func (stream, UNKNOWN_INSTRUCTION_32BIT, (unsigned)given);
+  return;
 }
 
 /* Print data bytes on INFO->STREAM.  */