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src bfd/ChangeLog bfd/archures.c bfd/bfd-in2.h ...

CVSROOT:	/cvs/src
Module name:	src
Changes by:	nickc@sourceware.org	2010-11-11 10:23:39

Modified files:
	bfd            : ChangeLog archures.c bfd-in2.h elfxx-mips.c 
	gas            : ChangeLog 
	gas/config     : tc-mips.c 
	gas/doc        : c-mips.texi 
	binutils       : ChangeLog readelf.c 
	include/elf    : ChangeLog mips.h 
	include/opcode : ChangeLog mips.h 
	opcodes        : ChangeLog mips-dis.c mips-opc.c 

Log message:
	bfd/
	* archures.c (bfd_mach_mips_loongson_3a): Defined.
	* bfd-in2.h (bfd_mach_mips_loongson_3a): Defined.
	* cpu-mips.c (I_loongson_3a): New add.
	(arch_info_struct): Add loongson_3a.
	* elfxx-mips.c (_bfd_elf_mips_mach): Add loongson_3a.
	(mips_set_isa_flags): Add loongson_3a.
	(mips_mach_extensions): Add loongson_3a in MIPS64 extensions.
	
	binutils/
	* readelf.c (get_machine_flags): Add loongson-3a.
	
	gas/
	* config/tc-mips.c (mips_cpu_info_table): Add loongson3a in MIPS 64.
	* doc/c-mips.texi (MIPS cpu): Add loongson3a.
	
	include/
	* elf/mips.h (E_MIPS_MACH_LS3A): Defined.
	* opcode/mips.h (INSN_LOONGSON_3A): Defined.
	(CPU_LOONGSON_3A): Defined.
	(OPCODE_IS_MEMBER): Add LOONGSON_3A.
	
	opcodes/
	* mips-dis.c (mips_arch_choices): Add loongson3a.
	* mips-opc.c (IL3A): Defined as INSN_LOONGSON_3A.
	(mips_builtin_opcodes): Modify some instructions' membership from
	IL2F to IL2F|IL3A, since these instructions are supported by Loongson_3A.

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/ChangeLog.diff?cvsroot=src&r1=1.5188&r2=1.5189
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/archures.c.diff?cvsroot=src&r1=1.150&r2=1.151
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/bfd-in2.h.diff?cvsroot=src&r1=1.523&r2=1.524
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/elfxx-mips.c.diff?cvsroot=src&r1=1.279&r2=1.280
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.4323&r2=1.4324
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-mips.c.diff?cvsroot=src&r1=1.431&r2=1.432
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/c-mips.texi.diff?cvsroot=src&r1=1.56&r2=1.57
http://sourceware.org/cgi-bin/cvsweb.cgi/src/binutils/ChangeLog.diff?cvsroot=src&r1=1.1713&r2=1.1714
http://sourceware.org/cgi-bin/cvsweb.cgi/src/binutils/readelf.c.diff?cvsroot=src&r1=1.522&r2=1.523
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/elf/ChangeLog.diff?cvsroot=src&r1=1.408&r2=1.409
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/elf/mips.h.diff?cvsroot=src&r1=1.43&r2=1.44
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.421&r2=1.422
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/mips.h.diff?cvsroot=src&r1=1.67&r2=1.68
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1671&r2=1.1672
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-dis.c.diff?cvsroot=src&r1=1.81&r2=1.82
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-opc.c.diff?cvsroot=src&r1=1.81&r2=1.82
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