From ff06cd9be9ce5929d3e119c6993c9621a5c4b251 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Tue, 16 Mar 2004 00:58:42 +0000 Subject: [PATCH] opcodes/ * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle PPC_OPERANDS_GPR_0. * ppc-opc.c (RA0): Define. (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0. (RAOPT): Rename from RAO. Update all uses. (powerpc_opcodes): Use RA0 as appropriate. Add "lsdx", "lsdi", "stsdx", "stsdi", "lmd" and "stmd" insns. include/opcode/ * ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines. gas/testsuite/ Update gas/ppc/. ld/testsuite/ Update ld-powerpc/. --- include/opcode/ChangeLog | 6 +++++- include/opcode/ppc.h | 27 +++++++++++++++------------ 2 files changed, 20 insertions(+), 13 deletions(-) diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index aafdb414b..d5bc8ac45 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2004-03-16 Alan Modra + + * ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines. + 2004-03-12 Michal Ludvig * i386.h (i386_optab): Added xstore as an alias for xstorerng. @@ -11,7 +15,7 @@ * h8300.h (32bit ldc/stc): Add relaxing support. 2004-01-12 Anil Paranjpe - + * h8300.h (BITOP): Pass MEMRELAX flag. 2004-01-09 Anil Paranjpe diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h index 342237e8d..d55caa756 100644 --- a/include/opcode/ppc.h +++ b/include/opcode/ppc.h @@ -1,5 +1,5 @@ /* ppc.h -- Header file for PowerPC opcode table - Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003 + Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Written by Ian Lance Taylor, Cygnus Support @@ -151,7 +151,7 @@ struct powerpc_operand operand value into an instruction, check this field. If it is NULL, execute - i |= (op & ((1 << o->bits) - 1)) << o->shift; + i |= (op & ((1 << o->bits) - 1)) << o->shift; (i is the instruction which we are filling in, o is a pointer to this structure, and op is the opcode value; this assumes twos complement arithmetic). @@ -170,7 +170,7 @@ struct powerpc_operand extract this operand type from an instruction, check this field. If it is NULL, compute - op = ((i) >> o->shift) & ((1 << o->bits) - 1); + op = ((i) >> o->shift) & ((1 << o->bits) - 1); if ((o->flags & PPC_OPERAND_SIGNED) != 0 && (op & (1 << (o->bits - 1))) != 0) op -= 1 << o->bits; @@ -233,17 +233,20 @@ extern const struct powerpc_operand powerpc_operands[]; register names with a leading 'r'. */ #define PPC_OPERAND_GPR (040) +/* Like PPC_OPERAND_GPR, but don't print a leading 'r' for r0. */ +#define PPC_OPERAND_GPR_0 (0100) + /* This operand names a floating point register. The disassembler prints these with a leading 'f'. */ -#define PPC_OPERAND_FPR (0100) +#define PPC_OPERAND_FPR (0200) /* This operand is a relative branch displacement. The disassembler prints these symbolically if possible. */ -#define PPC_OPERAND_RELATIVE (0200) +#define PPC_OPERAND_RELATIVE (0400) /* This operand is an absolute branch address. The disassembler prints these symbolically if possible. */ -#define PPC_OPERAND_ABSOLUTE (0400) +#define PPC_OPERAND_ABSOLUTE (01000) /* This operand is optional, and is zero if omitted. This is used for the optional BF and L fields in the comparison instructions. The @@ -251,7 +254,7 @@ extern const struct powerpc_operand powerpc_operands[]; and the number of operands remaining for the opcode, and decide whether this operand is present or not. The disassembler should print this operand out only if it is not zero. */ -#define PPC_OPERAND_OPTIONAL (01000) +#define PPC_OPERAND_OPTIONAL (02000) /* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand is omitted, then for the next operand use this operand value plus @@ -259,24 +262,24 @@ extern const struct powerpc_operand powerpc_operands[]; hack is needed because the Power rotate instructions can take either 4 or 5 operands. The disassembler should print this operand out regardless of the PPC_OPERAND_OPTIONAL field. */ -#define PPC_OPERAND_NEXT (02000) +#define PPC_OPERAND_NEXT (04000) /* This operand should be regarded as a negative number for the purposes of overflow checking (i.e., the normal most negative number is disallowed and one more than the normal most positive number is allowed). This flag will only be set for a signed operand. */ -#define PPC_OPERAND_NEGATIVE (04000) +#define PPC_OPERAND_NEGATIVE (010000) /* This operand names a vector unit register. The disassembler prints these with a leading 'v'. */ -#define PPC_OPERAND_VR (010000) +#define PPC_OPERAND_VR (020000) /* This operand is for the DS field in a DS form instruction. */ -#define PPC_OPERAND_DS (020000) +#define PPC_OPERAND_DS (040000) /* This operand is for the DQ field in a DQ form instruction. */ -#define PPC_OPERAND_DQ (040000) +#define PPC_OPERAND_DQ (0100000) /* The POWER and PowerPC assemblers use a few macros. We keep them with the operands table for simplicity. The macro table is an -- 2.43.5