From f6dcf2fd58c113e45ad789ba9640aafe651a3e69 Mon Sep 17 00:00:00 2001 From: "Frank Ch. Eigler" Date: Mon, 26 Nov 2001 16:41:08 +0000 Subject: [PATCH] 2001-11-26 Frank Ch. Eigler * doc/sim.texi, rtl.texi, porting.texi: Correct texinfo markup typos. --- ChangeLog | 4 ++++ doc/porting.texi | 6 +++--- doc/rtl.texi | 6 +++--- doc/sim.texi | 2 +- 4 files changed, 11 insertions(+), 7 deletions(-) diff --git a/ChangeLog b/ChangeLog index 68a785a..33842c7 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,7 @@ +2001-11-26 Frank Ch. Eigler + + * doc/sim.texi, rtl.texi, porting.texi: Correct texinfo markup typos. + 2001-11-14 Dave Brolley * utils-gen.scm (-gen-extract-word): Correct computation of the length diff --git a/doc/porting.texi b/doc/porting.texi index 1b6045d..372a9e3 100644 --- a/doc/porting.texi +++ b/doc/porting.texi @@ -104,7 +104,7 @@ The best way to do that is to take an existing file (such as the M32R) and use it as a template. Writing a CPU description file generally involves writing each of the -following types of entries, in order. @xref{RTL} for detailed +following types of entries, in order. @xref{RTL}, for detailed descriptions of each type of entry that appears in the description file. @menu @@ -305,7 +305,7 @@ write: @code{dnop} is short for ``define normal operand'' @footnote{A profound aversion to typing causes me to often provide brief names of things that -get typed a lot.}. @xref{RTL} for more information. +get typed a lot.}. @xref{RTL}, for more information. @node Writing define-insn @subsection Writing define-insn @@ -424,7 +424,7 @@ Here is an example from the M32R port. @code{.sym/.str} are short for Scheme's @code{symbol-append} and @code{string-append} operations and are conceptually the same as the C preprocessor's @code{##} concatenation operator. @xref{Symbol -concatenation} and @xref{String concatenation} for details. +concatenation}, and @xref{String concatenation}, for details. @node Interactive development @subsection Interactive development diff --git a/doc/rtl.texi b/doc/rtl.texi index eceb9fa..7ca217d 100644 --- a/doc/rtl.texi +++ b/doc/rtl.texi @@ -416,7 +416,7 @@ The syntax of @code{define-isa} is: Specifies the default size of an instruction word in bits. This affects the numbering of field bits in words beyond the base instruction. -@xref{Instruction fields} for more information. +@xref{Instruction fields}, for more information. ??? There is currently no explicit way to specify a different instruction word bitsize for particular instructions, it is derived from the instruction @@ -1210,7 +1210,7 @@ Bit numbering is determined by the @code{insn-lsb0?} field of @subsection length The number of bits in the field. The field must be contiguous. For non-contiguous instruction fields use "multi-ifields" -(@xref{Instruction fields}). +(@pxref{Instruction fields}). @subsection follows Optional. Experimental. @@ -2185,7 +2185,7 @@ Perform a comparison. @samp{cmpop} is one of @code{eq}, @code{ne}, @code{gtu}, @code{geu}. @item (mathop mode operand) -Perform a mathematical operation. @samp {mathop} is one of @code{sqrt}, +Perform a mathematical operation. @samp{mathop} is one of @code{sqrt}, @code{cos}, @code{sin}. @item (if mode condition then [else]) diff --git a/doc/sim.texi b/doc/sim.texi index 11c08fa..3d13e4c 100644 --- a/doc/sim.texi +++ b/doc/sim.texi @@ -42,4 +42,4 @@ Same as @file{semantics.c} but as one giant @code{switch} statement. A ``CPU family'' is an artificial creation to sort architecture variants along whatever lines seem useful. Additional hand-written files must be -provided. @xref{Porting} for details. +provided. @xref{Porting}, for details. -- 2.43.5