From 5ee50240760867e5907468d932f898ba1cd8a41f Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Wed, 23 Apr 2003 17:54:00 +0000 Subject: [PATCH] Handle the simulation of programs that load with data in ROM which needs to be copied into RAM before execution starts. --- libgloss/ChangeLog | 8 ++ libgloss/xstormy16/Makefile.in | 2 +- libgloss/xstormy16/crt0.s | 22 +++++- libgloss/xstormy16/eva_app.ld | 2 + libgloss/xstormy16/eva_stub.ld | 2 + libgloss/xstormy16/sim_high.ld | 2 + libgloss/xstormy16/sim_rom.ld | 138 +++++++++++++++++++++++++++++++++ 7 files changed, 174 insertions(+), 2 deletions(-) create mode 100644 libgloss/xstormy16/sim_rom.ld diff --git a/libgloss/ChangeLog b/libgloss/ChangeLog index b8b9a73f0..1eb42b41d 100644 --- a/libgloss/ChangeLog +++ b/libgloss/ChangeLog @@ -1,3 +1,11 @@ +2003-04-23 Andrew Haley + + * xstormy16/sim_rom.ld: New. + * xstormy16/Makefile.in (SIM_SCRIPTS): Add sim_rom.ld. + * xstormy16/crt0.s (_int_reset): Copy ROM data to RAM. + * xstormy16/eva_app.ld (_rdata, _data): New. + * xstormy16/sim_high.ld (_rdata, _data): New. + 2003-04-17 Inaoka Kazuhiro * m32r/Makefile.in: Add multilib support. diff --git a/libgloss/xstormy16/Makefile.in b/libgloss/xstormy16/Makefile.in index a4d50d963..02a9eca66 100644 --- a/libgloss/xstormy16/Makefile.in +++ b/libgloss/xstormy16/Makefile.in @@ -45,7 +45,7 @@ SCRIPTS = CRT = crt0.o crti.o crtn.o # Here is all of the simulator stuff -SIM_SCRIPTS = sim_high.ld +SIM_SCRIPTS = sim_high.ld sim_rom.ld SIM_LDFLAGS = SIM_BSP = libsim.a SIM_OBJS = syscalls.o sim_malloc_start.o diff --git a/libgloss/xstormy16/crt0.s b/libgloss/xstormy16/crt0.s index 28f8c8a8d..39e00d236 100644 --- a/libgloss/xstormy16/crt0.s +++ b/libgloss/xstormy16/crt0.s @@ -22,8 +22,10 @@ _start: ;; port1 interrupt jmpf _int_port1 - .text # Reset code, set up memory and call main. + .section .rodata +2: .word __rdata + .text _int_reset: ;; Set up the stack pointer. mov r0,#__stack @@ -36,6 +38,24 @@ _int_reset: mov r2,#0 0: mov.w (r0++),r2 blt r0,r1,0b + + ;; Copy data from ROM into RAM. ROM area may be above 64k, + ;; but RAM may not. + mov r1,#__data + mov r3,#_edata + mov r4,#2b + mov.w r0,(r4++) + mov.w r2,(r4) + mov r8,r2 + ;; If _data == _rdata there's no need to copy anything. + bnz r0,r1,0f + bz r2,#0,1f +0: movf.w r2,(r0++) + bnz r0,#0,2f + add r8,#1 +2: mov.w (r1++),r2 + blt r1,r3,0b +1: ;; Call hardware init routine callf _hwinit ;; Call initialization routines diff --git a/libgloss/xstormy16/eva_app.ld b/libgloss/xstormy16/eva_app.ld index 484a53297..5afc2b494 100644 --- a/libgloss/xstormy16/eva_app.ld +++ b/libgloss/xstormy16/eva_app.ld @@ -16,6 +16,8 @@ SECTIONS __malloc_start = 0x800; .data : { + __rdata = .; + __data = .; *(.data) *(.data.*) *(.gnu.linkonce.d.*) diff --git a/libgloss/xstormy16/eva_stub.ld b/libgloss/xstormy16/eva_stub.ld index cc46734ea..725e623cb 100644 --- a/libgloss/xstormy16/eva_stub.ld +++ b/libgloss/xstormy16/eva_stub.ld @@ -78,6 +78,8 @@ SECTIONS PROVIDE (etext = .); .data : { + __data = .; + __rdata = .; *(.data) *(.data.*) *(.gnu.linkonce.d.*) diff --git a/libgloss/xstormy16/sim_high.ld b/libgloss/xstormy16/sim_high.ld index 3c740e277..abeb01f3c 100644 --- a/libgloss/xstormy16/sim_high.ld +++ b/libgloss/xstormy16/sim_high.ld @@ -17,6 +17,8 @@ SECTIONS { .data : { + __data = .; + __rdata = .; *(.data) *(.data.*) *(.gnu.linkonce.d.*) diff --git a/libgloss/xstormy16/sim_rom.ld b/libgloss/xstormy16/sim_rom.ld new file mode 100644 index 000000000..c8f5a8d16 --- /dev/null +++ b/libgloss/xstormy16/sim_rom.ld @@ -0,0 +1,138 @@ +/* Test xstormy16 programs that have initial data in ROM and copy it + to RAM. */ + +OUTPUT_FORMAT("elf32-xstormy16", "elf32-xstormy16", + "elf32-xstormy16") +OUTPUT_ARCH(xstormy16) +ENTRY(_start) + SEARCH_DIR(/cuddles/aph/sanyo-011113-branch/install/xstormy16-elf/lib); +/* There are two memory regions we care about, one from 0 through 0x7F00 + that is RAM and one from 0x8000 up which is ROM. */ +MEMORY +{ + RAM (w) : ORIGIN = 0, LENGTH = 0x7F00 + ROM (!w) : ORIGIN = 0x8000, LENGTH = 0xFF8000 +} +SECTIONS +{ + /* Read-only sections in ROM. */ + .int_vec : { *(.int_vec) } > ROM + .rodata : { *(.rodata) *(.rodata.*) *(.gnu.linkonce.r.*) } > ROM + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } > ROM + .dtors : + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } > ROM + .jcr : { KEEP (*(.jcr)) } > ROM + .eh_frame : { KEEP (*(.eh_frame)) } > ROM + .gcc_except_table : { *(.gcc_except_table) } > ROM + .plt : { *(.plt) } > ROM + .text : + { + *(.text) + *(.text.*) + *(.stub) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.gnu.linkonce.t.*) + } > ROM =0 + .init : + { + KEEP (*(.init)) + } > ROM =0 + .fini : + { + KEEP (*(.fini)) + } > ROM =0 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + . = ALIGN(2); + __rdata = .; + .data : AT (__rdata) + { + __data = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + SORT(CONSTRUCTORS) + } > RAM + _edata = .; + PROVIDE (edata = .); + __bss_start = .; + /* Why do we need to give bss an AT address at all? Because if we + don't, ld will generate another program header for it rather than + using the one for .data. */ + .bss : AT (LOADADDR(.data) + SIZEOF(.data)) + { + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(2); + } > RAM + . = ALIGN(2); + _end = .; + __stack = .; + PROVIDE (end = .); + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /* These must appear regardless of . */ +} -- 2.43.5