Jan Beulich [Tue, 23 Nov 2004 07:55:12 +0000 (07:55 +0000)]
gas/
2004-11-23 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (CpuMMX2): Declare. Artificial classifier to
indicate the MMX extensions added by both SSE and 3DNow!A.
(Cpu3dnowA): Declare.
(CpuUnknownFlags): Update.
* config/tc-i386.c (cpu_sub_arch_name): Declare.
(cpu_arch): i586 and pentium do not imply MMX. i686 and pentiumpro do
neither imply SSE nor MMX. k6 implies MMX. k6_2 additionally implies
3DNow!. Athlon additionally implies 3DNow!A. Several new
entries (those starting with a dot are for sub-arch specification).
(set_cpu_arch): Handle sub-arch specifications.
(parse_insn): Distinguish between instructions not supported because
of insufficient CPU features and because of 64-bit mode.
* doc/c-i386.texi: Describe enhanced .arch directive.
include/opcode/
2004-11-23 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): paddq and psubq, even in their MMX form, are
available only with SSE2. Change the MMX additions introduced by SSE
and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
instructions by their now designated identifier (since combining i686
and 3DNow! does not really imply 3DNow!A).
Pierre Humblet [Sat, 20 Nov 2004 19:09:19 +0000 (19:09 +0000)]
2004-11-20 Pierre Humblet <pierre.humblet@ieee.org>
* cygheap.h (cygheap_user::get_windows_id): New method.
* registry.h (get_registry_hive_path): Change argument type.
(load_registry_hive): Ditto.
* registry.cc (get_registry_hive_path): Change argument type and take
Win9x keys into account.
(load_registry_hive): Ditto.
* uinfo.cc (cygheap_user::env_userprofile): Use get_windows_id, even
for SYSTEM.
* shared.cc (user_shared_initialize): Use get_windows_id.
* syscalls.cc (seteuid32): Load the registry hive and reload the user
shared also on Win9x.
Pierre Humblet [Sat, 13 Nov 2004 16:30:19 +0000 (16:30 +0000)]
2004-11-13 Pierre Humblet <pierre.humblet@ieee.org>
* kill.cc (forcekill): Do not pass negative pids to
cygwin_internal. Check if sig == 0. Improve error messages.
(main): Make pid a long long and distinguish between pids, gpids
(i.e. negative pids) and Win9x pids.
gas/ChangeLog
* config/tc-xtensa.c (finish_vinsn): Clear pending instruction if
there is a conflict.
(check_t1_t2_reads_and_writes): Check for both reads and writes to
interfaces that are related as determined by xtensa_interface_class_id.
Geoffrey Keating [Fri, 12 Nov 2004 19:38:13 +0000 (19:38 +0000)]
PR 18423
* configure.in: Remove all instances of build-fixincludes from
noconfigdirs.
(build_configargs): Supply --target to subdirectories.
* configure: Regenerate.
* Makefile.def: Make gcc install depend on fixincludes install.
* Makefile.in: Regenerate.
Danny Smith [Tue, 9 Nov 2004 09:06:03 +0000 (09:06 +0000)]
* include/winnls.h (WINBASEAPI): Define as DECLSPEC_IMPORT.
if undefined. and __W32API_USE_DLLIMPORT__.
Add WINBASEAPI token to prototypes, throughout.
* cris.h (enum cris_insn_version_usage): Tweak formatting and
comments. Remove member cris_ver_sim. Add members
cris_ver_sim_v0_10, cris_ver_v0_10, cris_ver_v3_10,
cris_ver_v8_10, cris_ver_v10, cris_ver_v10p.
(struct cris_support_reg, struct cris_cond15): New types.
(cris_conds15): Declare.
(JUMP_PC_INCR_OPCODE_V32, BA_DWORD_OPCODE, NOP_OPCODE_COMMON)
(NOP_OPCODE_ZBITS_COMMON, LAPC_DWORD_OPCODE, LAPC_DWORD_Z_BITS)
(NOP_OPCODE_V32, NOP_Z_BITS_V32): New macros.
(NOP_Z_BITS): Define in terms of NOP_OPCODE.
(cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and
SIZE_FIELD_UNSIGNED.
Jan Beulich [Thu, 4 Nov 2004 09:16:08 +0000 (09:16 +0000)]
gas/
2004-11-04 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (set_intel_syntax): Allow % in symbol names when
intel syntax and no register prefix, allow $ in symbol names when
intel syntax.
(set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX.
(intel_float_operand): Add fourth return value indicating math control
operations. Make classification more precise.
(md_assemble): Complain if memory operand of mov[sz]x has no size
specified.
(parse_insn): Translate word operands to floating point instructions
operating on integers as well as control instructions to short ones
as expected by AT&T syntax. Translate 'd' suffix to short one only for
floating point instructions operating on non-integer operands.
(match_template): Remove fldcw special case. Adjust q-suffix handling
to permit it on fild/fistp/fisttp in AT&T mode.
(process_suffix): Don't guess DefaultSize insns' suffix from
stackop_size for certain floating point control instructions. Guess
suffix for branch and [ls][gi]dt based on flag_code. Split error
messages for Intel and AT&T syntax, and make the condition more strict
for the former. Adjust suppressing of generation of operand size
overrides.
(intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE,
OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add
more error checking.
* config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR
SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines.
gas/testsuite/
2004-11-04 Jan Beulich <jbeulich@novell.com>
* gas/i386/i386.exp: Execute new tests intelbad and intelok.
* gas/i386/intelbad.[sl]: New test to check for various things not
permitted in Intel mode.
* gas/i386/intel.d, gas/i386/opcode.d, gas/i386/x86-64-opcode.d:
Adjust for change to segment register store.
* gas/i386/intelok.[sd]: New test to check various Intel mode specific
things get handled correctly.
* gas/i386/x86_64.[sd]: Remove unsupported constructs referring to
'high' and 'low' parts of an operand, which the parser previously
accepted while neither telling that it's not supported nor that it
ignored the remainder of the line following these supposed keywords.
include/opcode/
2004-11-04 Jan Beulich <jbeulich@novell.com>
* i386.h (sldx_Suf): Remove.
(FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
(q_FP): Define, implying no REX64.
(x_FP, sl_FP): Imply FloatMF.
(i386_optab): Split reg and mem forms of moving from segment registers
so that the memory forms can ignore the 16-/32-bit operand size
distinction. Adjust a few others for Intel mode. Remove *FP uses from
all non-floating-point instructions. Unite 32- and 64-bit forms of
movsx, movzx, and movd. Adjust floating point operations for the above
changes to the *FP macros. Add DefaultSize to floating point control
insns operating on larger memory ranges. Remove left over comments
hinting at certain insns being Intel-syntax ones where the ones
actually meant are already gone.
opcodes/
2004-11-04 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
(indirEb): Remove.
(Mp): Use f_mode rather than none at all.
(t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
replaces what previously was x_mode; x_mode now means 128-bit SSE
operands.
(dis386): Make far jumps and calls have an 'l' prefix only in AT&T
mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
pinsrw's second operand is Edqw.
(grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
mode when an operand size override is present or always suffixing.
More instructions will need to be added to this group.
(putop): Handle new macro chars 'C' (short/long suffix selector),
'I' (Intel mode override for following macro char), and 'J' (for
adding the 'l' prefix to far branches in AT&T mode). When an
alternative was specified in the template, honor macro character when
specified for Intel mode.
(OP_E): Handle new *_mode values. Correct pointer specifications for
memory operands. Consolidate output of index register.
(OP_G): Handle new *_mode values.
(OP_I): Handle const_1_mode.
(OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
respective opcode prefix bits have been consumed.
(OP_EM, OP_EX): Provide some default handling for generating pointer
specifications.
* cygtls.cc (_cygtls::fixup_after_fork): Wipe out exitsock local since it
should not be used by the child.
* select.cc (start_thread_socket): Turn off inheritance for exitsock. Don't
add exitsock to exception mask since it should never get an exception.
(socket_cleanup): Change some debug messages for consistency.
* fhandler_socket.cc (fhandler_socket::dup): Change comment wording slightly.
* configure.in (case ${target}): Do not build fixincludes
on platforms where it is not used.
* configure: Regenerated.
----------------------------------------------------------------------
* select.cc (start_thread_socket): Remove attempt to delay reading of exitsock
or suffer occasional mysterious 60 second hangs.
(socket_cleanup): Empty the exitsock here after the thread has terminated.
Paul Brook [Tue, 12 Oct 2004 14:17:08 +0000 (14:17 +0000)]
2004-10-12 Paul Brook <paul@codesourcery.com>
bfd/
* elf32-arm.h: Support EABI version 4 objects.
binutils/
* readelf.c (decode_ARM_machine_flags): Support EABI version 4.
gas/
* config/tc-arm.c (md_begin): Change EF_ARM_EABI_VER3 to
EF_ARM_EABI_VER4.
(arm_eabis): Ditto.
* doc/c-arm.texi: Document that we actually support -meabi=4, not
-meabi=3.
include/
* elf/arm.h (EF_ARM_EABI_VER4): Define.
git://sourceware.org / newlib-cygwin.git / log