From: Richard Sandiford Date: Sun, 24 Jul 2011 14:04:50 +0000 (+0000) Subject: include/opcode/ X-Git-Tag: binutils-2_22-branchpoint~108 X-Git-Url: https://sourceware.org/git/?a=commitdiff_plain;h=f9576a7ec50dd2fc0b95a28e839cd82e60445f4b;p=newlib-cygwin.git include/opcode/ 2011-07-24 Maciej W. Rozycki * mips.h (INSN_TRAP): Rename to... (INSN_NO_DELAY_SLOT): ... this. (INSN_SYNC): Remove macro. gas/ 2011-07-24 Maciej W. Rozycki * config/tc-mips.c (can_swap_branch_p): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. Remove the check for INSN_SYNC as well as explicit checks for ERET and DERET when scheduling branch delay slots. opcodes/ 2011-07-24 Maciej W. Rozycki * mips-opc.c (NODS): New macro. (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. (DSP_VOLA): Likewise. (mips_builtin_opcodes): Add NODS annotation to "deret" and "eret". Replace INSN_SYNC with NODS throughout. Use NODS in place of TRAP for "wait", "waiti" and "yield". * mips16-opc.c (NODS): New macro. (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. (mips16_opcodes): Use NODS in place of TRAP for "jalrc", "jrc", "restore" and "save". --- diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 5e30fbcd4..7f4cdab11 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,9 @@ +2011-07-24 Maciej W. Rozycki + + * mips.h (INSN_TRAP): Rename to... + (INSN_NO_DELAY_SLOT): ... this. + (INSN_SYNC): Remove macro. + 2011-07-01 Eric B. Weddington * avr.h (AVR_ISA_AVR6): Remove AVR_ISA_SPMX as it was actually diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 0685baba0..72a478c47 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -489,8 +489,9 @@ struct mips_opcode #define INSN_WRITE_HI 0x01000000 /* Modifies the LO register. */ #define INSN_WRITE_LO 0x02000000 -/* Takes a trap (easier to keep out of delay slot). */ -#define INSN_TRAP 0x04000000 +/* Not to be placed in a branch delay slot, either architecturally + or for ease of handling (such as with instructions that take a trap). */ +#define INSN_NO_DELAY_SLOT 0x04000000 /* Instruction stores value into memory. */ #define INSN_STORE_MEMORY 0x08000000 /* Instruction uses single precision floating point. */ @@ -499,8 +500,6 @@ struct mips_opcode #define FP_D 0x20000000 /* Instruction is part of the tx39's integer multiply family. */ #define INSN_MULT 0x40000000 -/* Instruction synchronize shared memory. */ -#define INSN_SYNC 0x80000000 /* Instruction is actually a macro. It should be ignored by the disassembler, and requires special treatment by the assembler. */ #define INSN_MACRO 0xffffffff