From: cvs2svn <> Date: Sat, 19 Apr 2003 00:19:41 +0000 (+0000) Subject: This commit was manufactured by cvs2svn to create branch X-Git-Tag: kettenis_i386newframe-20030419-branchpoint X-Git-Url: https://sourceware.org/git/?a=commitdiff_plain;h=cd4993ccbb652517e41c35c020bc7f737cac8ec3;p=newlib-cygwin.git This commit was manufactured by cvs2svn to create branch 'kettenis_i386newframe-20030419-branch'. Sprout from kettenis_i386newframe-20030406-branch 2003-04-04 08:15:16 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Cherrypick from master 2003-04-19 00:19:40 UTC DJ Delorie '* Makefile.tpl (MAKEINFOFLAGS): Default to --split-size=5000000.': ChangeLog Makefile.in Makefile.tpl configure configure.in include/coff/ChangeLog include/coff/h8300.h include/coff/h8500.h include/coff/sh.h include/elf/ChangeLog include/elf/common.h include/opcode/ChangeLog include/opcode/h8300.h include/opcode/mips.h libtool.m4 --- diff --git a/ChangeLog b/ChangeLog index 326297949..3008cc64e 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,30 @@ +2003-04-18 Gerald Pfeifer + + * Makefile.tpl (MAKEINFOFLAGS): Default to --split-size=5000000. + * Makefile.in: Regenerate. + +2003-04-18 Jakub Jelinek + + * configure.in (powerpc64*-*-linux*): Remove. + * configure: Rebuilt. + +2003-04-17 Phil Edwards + + * Makefile.tpl (GCC_STRAP_TARGETS): New variable containing all the + previous bootstrap targets, plus bubblestrap, quickstrap, cleanstrap, + and restrap. + * Makefile.in: Regenerate. + +2003-04-16 Richard Earnshaw + + * configure.in (arm-*-netbsdelf*): Enable building java libraries. + * configure: Regenerated. + +2003-04-11 Alexandre Oliva + + * libtool.m4 (lt_cv_deplibs_check_method): Use pass_all on mips*. + * */configure: Rebuilt. + 2003-03-14 Nathanael Nerode * Makefile.tpl: Move .NOEXPORT, MAKEOVERRIDES back down. diff --git a/Makefile.in b/Makefile.in index f70250dd8..1b993f59e 100644 --- a/Makefile.in +++ b/Makefile.in @@ -203,7 +203,8 @@ USUAL_MAKEINFO = `if [ -f $$r/texinfo/makeinfo/makeinfo ] ; \ # This just becomes part of the MAKEINFO definition passed down to # sub-makes. It lets flags be given on the command line while still # using the makeinfo from the object tree. -MAKEINFOFLAGS = +# (Default to avoid splitting info files by setting the threshold high.) +MAKEINFOFLAGS = --split-size=5000000 EXPECT = `if [ -f $$r/expect/expect ] ; \ then echo $$r/expect/expect ; \ @@ -7264,8 +7265,9 @@ all-gcc: configure-gcc # In theory, on an SMP all those dependencies can be resolved # in parallel. # -.PHONY: bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap -bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap: all-bootstrap configure-gcc +GCC_STRAP_TARGETS = bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap +.PHONY: $(GCC_STRAP_TARGETS) +$(GCC_STRAP_TARGETS): all-bootstrap configure-gcc @r=`${PWD}`; export r; \ s=`cd $(srcdir); ${PWD}`; export s; \ $(SET_LIB_PATH) \ diff --git a/Makefile.tpl b/Makefile.tpl index 72e24983c..314c44977 100644 --- a/Makefile.tpl +++ b/Makefile.tpl @@ -206,7 +206,8 @@ USUAL_MAKEINFO = `if [ -f $$r/texinfo/makeinfo/makeinfo ] ; \ # This just becomes part of the MAKEINFO definition passed down to # sub-makes. It lets flags be given on the command line while still # using the makeinfo from the object tree. -MAKEINFOFLAGS = +# (Default to avoid splitting info files by setting the threshold high.) +MAKEINFOFLAGS = --split-size=5000000 EXPECT = `if [ -f $$r/expect/expect ] ; \ then echo $$r/expect/expect ; \ @@ -1189,8 +1190,9 @@ all-gcc: configure-gcc # In theory, on an SMP all those dependencies can be resolved # in parallel. # -.PHONY: bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap -bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap: all-bootstrap configure-gcc +GCC_STRAP_TARGETS = bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap +.PHONY: $(GCC_STRAP_TARGETS) +$(GCC_STRAP_TARGETS): all-bootstrap configure-gcc @r=`${PWD}`; export r; \ s=`cd $(srcdir); ${PWD}`; export s; \ $(SET_LIB_PATH) \ diff --git a/configure b/configure index 3fc3a7278..045ad147f 100755 --- a/configure +++ b/configure @@ -1009,6 +1009,7 @@ case "${target}" in # Skip some stuff that's unsupported on some NetBSD configurations. case "${target}" in i*86-*-netbsdelf*) ;; + arm*-*-netbsdelf*) ;; *) noconfigdirs="$noconfigdirs ${libgcj}" ;; @@ -1266,11 +1267,6 @@ case "${target}" in powerpc-*-eabi) noconfigdirs="$noconfigdirs ${libgcj}" ;; - powerpc64*-*-linux*) - noconfigdirs="$noconfigdirs target-newlib target-libgloss" - # not yet ported. - noconfigdirs="$noconfigdirs target-libffi" - ;; rs6000-*-lynxos*) noconfigdirs="$noconfigdirs target-newlib gprof ${libgcj}" ;; diff --git a/configure.in b/configure.in index 45239e2fa..f695982d7 100644 --- a/configure.in +++ b/configure.in @@ -349,6 +349,7 @@ case "${target}" in # Skip some stuff that's unsupported on some NetBSD configurations. case "${target}" in i*86-*-netbsdelf*) ;; + arm*-*-netbsdelf*) ;; *) noconfigdirs="$noconfigdirs ${libgcj}" ;; @@ -606,11 +607,6 @@ case "${target}" in powerpc-*-eabi) noconfigdirs="$noconfigdirs ${libgcj}" ;; - powerpc64*-*-linux*) - noconfigdirs="$noconfigdirs target-newlib target-libgloss" - # not yet ported. - noconfigdirs="$noconfigdirs target-libffi" - ;; rs6000-*-lynxos*) noconfigdirs="$noconfigdirs target-newlib gprof ${libgcj}" ;; diff --git a/include/coff/ChangeLog b/include/coff/ChangeLog index be6154d21..353eb5991 100644 --- a/include/coff/ChangeLog +++ b/include/coff/ChangeLog @@ -1,3 +1,9 @@ +2003-04-15 Rohit Kumar Srivastava + + * sh.h: Replace occurrances of 'Hitachi' with 'Renesas'. + * h8300.h: Likewise. + * h8500.h: Likewise. + 2003-03-25 Stan Cox Nick Clifton diff --git a/include/coff/h8300.h b/include/coff/h8300.h index 3ed5aefac..c30dc0097 100644 --- a/include/coff/h8300.h +++ b/include/coff/h8300.h @@ -1,6 +1,6 @@ -/* coff information for Hitachi H8/300 and H8/300-H +/* coff information for Renesas H8/300 and H8/300-H - Copyright 2001 Free Software Foundation, Inc. + Copyright 2001, 2003 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/include/coff/h8500.h b/include/coff/h8500.h index 87e5754c6..62968cad9 100644 --- a/include/coff/h8500.h +++ b/include/coff/h8500.h @@ -1,6 +1,6 @@ -/* coff information for Hitachi H8/500 +/* coff information for Renesas H8/500 - Copyright 2001 Free Software Foundation, Inc. + Copyright 2001, 2003 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/include/coff/sh.h b/include/coff/sh.h index c77316e40..d20834ca6 100644 --- a/include/coff/sh.h +++ b/include/coff/sh.h @@ -1,6 +1,6 @@ -/* coff information for Hitachi SH +/* coff information for Renesas SH - Copyright 2001 Free Software Foundation, Inc. + Copyright 2001, 2003 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 9d5ea67c1..b84eac528 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,7 @@ +2003-04-15 Rohit Kumar Srivastava + + * common.h: Replace occurrances of 'Hitachi' with 'Renesas'. + 2003-04-01 Bob Wilson * elf/common.h (EM_XTENSA_OLD): Define. diff --git a/include/elf/common.h b/include/elf/common.h index a515817a5..02665b715 100644 --- a/include/elf/common.h +++ b/include/elf/common.h @@ -7,32 +7,32 @@ in "UNIX System V Release 4, Programmers Guide: ANSI C and Programming Support Tools". -This file is part of BFD, the Binary File Descriptor library. + This file is part of BFD, the Binary File Descriptor library. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* This file is part of ELF support for BFD, and contains the portions that are common to both the internal and external representations. For example, ELFMAG0 is the byte 0x7F in both the internal (in-memory) - and external (in-file) representations. */ + and external (in-file) representations. */ #ifndef _ELF_COMMON_H #define _ELF_COMMON_H -/* Fields in e_ident[] */ +/* Fields in e_ident[]. */ #define EI_MAG0 0 /* File identification byte 0 index */ #define ELFMAG0 0x7F /* Magic number byte 0 */ @@ -126,14 +126,14 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define EM_RCE 39 /* Old name for MCore */ #define EM_ARM 40 /* ARM */ #define EM_OLD_ALPHA 41 /* Digital Alpha */ -#define EM_SH 42 /* Hitachi SH */ +#define EM_SH 42 /* Renesas (formerly Hitachi) SH */ #define EM_SPARCV9 43 /* SPARC v9 64-bit */ #define EM_TRICORE 44 /* Siemens Tricore embedded processor */ #define EM_ARC 45 /* ARC Cores */ -#define EM_H8_300 46 /* Hitachi H8/300 */ -#define EM_H8_300H 47 /* Hitachi H8/300H */ -#define EM_H8S 48 /* Hitachi H8S */ -#define EM_H8_500 49 /* Hitachi H8/500 */ +#define EM_H8_300 46 /* Renesas (formerly Hitachi) H8/300 */ +#define EM_H8_300H 47 /* Renesas (formerly Hitachi) H8/300H */ +#define EM_H8S 48 /* Renesas (formerly Hitachi) H8S */ +#define EM_H8_500 49 /* Renesas (formerly Hitachi) H8/500 */ #define EM_IA_64 50 /* Intel IA-64 Processor */ #define EM_MIPS_X 51 /* Stanford MIPS-X */ #define EM_COLDFIRE 52 /* Motorola Coldfire */ diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 35c97a68f..8080909db 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,11 @@ +2003-04-07 Michael Snyder + + * h8300.h (ldc/stc): Fix up src/dst swaps. + +2003-04-09 J. Grant + + * mips.h: Correct comment typo. + 2003-03-21 Martin Schwidefsky * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val. diff --git a/include/opcode/h8300.h b/include/opcode/h8300.h index bdba34567..02f415be8 100644 --- a/include/opcode/h8300.h +++ b/include/opcode/h8300.h @@ -436,7 +436,7 @@ const struct h8_opcode h8_opcodes[] = NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_16,CCR|DST,E}},{{PREFIXLDC,0x6,0xF,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP, NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_32,CCR|DST,E}},{{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}}EOP, NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSINC,CCR|DST,E}}, {{PREFIXLDC,0x6,0xD,B30|RSINC,0x0,E}}EOP, - NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,CCR|DST,E}}, {{PREFIXLDC,0x6,0x9,B30|RDIND,0x0,E}} EOP, + NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,CCR|DST,E}}, {{PREFIXLDC,0x6,0x9,B30|RSIND,0x0,E}} EOP, NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{IMM8,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x0,0x7,IMM8,IGNORE,E,0,0,0,0}}EOP, NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{OR8,EXR|DST,E}}, {{ 0x0,0x3,0x1,OR8,E,0,0,0,0}}EOP, @@ -445,7 +445,7 @@ const struct h8_opcode h8_opcodes[] = NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_16,EXR|DST,E}},{{ 0x0,0x1,0x4,0x1,0x6,0xf,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP, NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_32,EXR|DST,E}},{{ 0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}}EOP, NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSINC,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0xd,B30|RSINC,0x0,E}}EOP, - NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0x9,B30|RDIND,0x0,E}} EOP, + NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0x9,B30|RSIND,0x0,E}} EOP, SOP(O(O_MOV_TO_REG,SB),4,"mov.b"),{{ABS|SRC|L_16|MEMRELAX,RD8,E}}, {{ 0x6,0xA,0x0,RD8,SRC|ABS|MEMRELAX|A16LIST,E}}EOP, SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{{ABS|SRC|L_32|MEMRELAX,RD8,E }}, {{ 0x6,0xA,0x2,RD8,SRC|ABS|MEMRELAX|A32LIST,E }}EOP, @@ -556,7 +556,7 @@ const struct h8_opcode h8_opcodes[] = NEW_SOP(O(O_STC,SB), 1,2,"stc"),{{CCR|SRC,RD8,E}},{{ 0x0,0x2,0x0,RD8,E,0,0,0,0}} EOP, - NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RSIND,E}}, {{PREFIXLDC,0x6,0x9,B31|RDIND,0x0,E}} EOP, + NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RDIND,E}}, {{PREFIXLDC,0x6,0x9,B31|RDIND,0x0,E}} EOP, NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,DISP|DST|L_16,E}},{{PREFIXLDC,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP, NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,DISP|DST|L_32,E}},{{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}}EOP, NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RDDEC,E}}, {{PREFIXLDC,0x6,0xD,B31|RDDEC,0x0,E}}EOP, @@ -566,7 +566,7 @@ const struct h8_opcode h8_opcodes[] = NEW_SOP(O(O_STC,SB), 1,2,"stc"),{{EXR|SRC,RD8,E}},{{ 0x0,0x2,0x1,RD8,E,0,0,0,0}} EOP, - NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RSIND,E}}, {{0x0,0x1,0x4,0x1,0x6,0x9,B31|RDIND,0x0,E}} EOP, + NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RDIND,E}}, {{0x0,0x1,0x4,0x1,0x6,0x9,B31|RDIND,0x0,E}} EOP, NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,DISP|DST|L_16,E}},{{0x0,0x1,0x4,0x1,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP, NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,DISP|DST|L_32,E}},{{0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}}EOP, NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RDDEC,E}}, {{0x0,0x1,0x4,0x1,0x6,0xD,B31|RDDEC,0x0,E}}EOP, diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 1f90cfd76..476c8e311 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -197,7 +197,7 @@ struct mips_opcode unsigned long membership; }; -/* These are the characters which may appears in the args field of an +/* These are the characters which may appear in the args field of an instruction. They appear in the order in which the fields appear when the instruction is used. Commas and parentheses in the args string are ignored when assembling, and written into the output diff --git a/libtool.m4 b/libtool.m4 index eca1da32e..d2e36088d 100644 --- a/libtool.m4 +++ b/libtool.m4 @@ -636,7 +636,7 @@ irix5* | irix6*) # This must be Linux ELF. linux-gnu*) case $host_cpu in - alpha* | hppa* | i*86 | powerpc* | sparc* | ia64* ) + alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* ) lt_cv_deplibs_check_method=pass_all ;; *) # glibc up to 2.1.1 does not perform some relocations on ARM