Optimize to reduce FPCR/FPSR accesses.

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+2014-12-22  Wilco Dijkstra  <wdijkstr@arm.com>
+
+       * sysdeps/aarch64/fpu/fesetenv.c (fesetenv):
+       Optimize to reduce FPCR/FPSR accesses.
+
 2014-12-22  Wilco Dijkstra  <wdijkstr@arm.com>
 
        * sysdeps/aarch64/fpu/ftestexcept.c (fetestexcept):