]> sourceware.org Git - glibc.git/commitdiff
powerpc64: Check cacheline size before using optimised memset routines
authorAnton Blanchard <anton@ozlabs.org>
Tue, 27 Jul 2021 05:47:50 +0000 (15:47 +1000)
committerTulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
Fri, 6 Aug 2021 19:09:59 +0000 (16:09 -0300)
A number of optimised memset routines assume the cacheline size is 128B,
so we better check before using them.

Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
sysdeps/powerpc/powerpc64/multiarch/memset.c

index 32564c8f1f253a9107865fe19c87174316659ef5..a3fdcd43bd58ac7bcaa171d3ac04a85a54c540cb 100644 (file)
@@ -35,6 +35,9 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
 
   unsigned long int hwcap = GLRO(dl_hwcap);
   unsigned long int hwcap2 = GLRO(dl_hwcap2);
+#ifdef SHARED
+  int cacheline_size = GLRO(dl_cache_line_size);
+#endif
 
   /* hwcap contains only the latest supported ISA, the code checks which is
      and fills the previous supported ones.  */
@@ -90,16 +93,21 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
              IFUNC_IMPL_ADD (array, i, memset,
                              hwcap2 & PPC_FEATURE2_ARCH_3_1
                              && hwcap2 & PPC_FEATURE2_HAS_ISEL
-                             && hwcap & PPC_FEATURE_HAS_VSX,
+                             && hwcap & PPC_FEATURE_HAS_VSX
+                             && cacheline_size == 128,
                              __memset_power10)
 #endif
-             IFUNC_IMPL_ADD (array, i, memset, hwcap2 & PPC_FEATURE2_ARCH_2_07,
+             IFUNC_IMPL_ADD (array, i, memset, hwcap2 & PPC_FEATURE2_ARCH_2_07
+                             && cacheline_size == 128,
                              __memset_power8)
-             IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_06,
+             IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_06
+                             && cacheline_size == 128,
                              __memset_power7)
-             IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_05,
+             IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_05
+                             && cacheline_size == 128,
                              __memset_power6)
-             IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_POWER4,
+             IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_POWER4
+                             && cacheline_size == 128,
                              __memset_power4)
              IFUNC_IMPL_ADD (array, i, memset, 1, __memset_ppc))
 
index c1aa143f607dec0b8bb7880759b40c340a840828..056e911699b2f3746beef039945cb7344f44f89a 100644 (file)
@@ -43,16 +43,21 @@ libc_ifunc (__libc_memset,
 # ifdef __LITTLE_ENDIAN__
            (hwcap2 & PPC_FEATURE2_ARCH_3_1
             && hwcap2 & PPC_FEATURE2_HAS_ISEL
-            && hwcap & PPC_FEATURE_HAS_VSX)
+            && hwcap & PPC_FEATURE_HAS_VSX
+            && GLRO(dl_cache_line_size) == 128)
            ? __memset_power10 :
 # endif
-            (hwcap2 & PPC_FEATURE2_ARCH_2_07)
+            (hwcap2 & PPC_FEATURE2_ARCH_2_07
+            && GLRO(dl_cache_line_size) == 128)
             ? __memset_power8 :
-             (hwcap & PPC_FEATURE_ARCH_2_06)
+             (hwcap & PPC_FEATURE_ARCH_2_06
+              && GLRO(dl_cache_line_size) == 128)
              ? __memset_power7 :
-               (hwcap & PPC_FEATURE_ARCH_2_05)
+               (hwcap & PPC_FEATURE_ARCH_2_05
+                && GLRO(dl_cache_line_size) == 128)
                ? __memset_power6 :
-                 (hwcap & PPC_FEATURE_POWER4)
+                 (hwcap & PPC_FEATURE_POWER4
+                  && GLRO(dl_cache_line_size) == 128)
                  ? __memset_power4
             : __memset_ppc);
 
This page took 0.045887 seconds and 5 git commands to generate.