2003-05-18 Jason Eckhardt <jle@rice.edu>

gas:
        * config/tc-i860.c (i860_process_insn): Initialize fc after
        each opcode mismatch.

include/opcode:
        * i860.h (form, pform): Add missing .dd suffix.

opcodes:
        * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
        print it.

bfd:
        * elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 0c666ec246d934a3115dc0d799eb8d84ae5f5d18..9aff27425b565e711599855af1f20c138dd251dc 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2003-05-18  Jason Eckhardt  <jle@rice.edu>
+
+       * i860.h (form, pform): Add missing .dd suffix.
+
 2003-05-13  Stephane Carrez  <stcarrez@nerim.fr>
 
        * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000

diff --git a/include/opcode/i860.h b/include/opcode/i860.h
index 2d6ea19abea8ca63998f0f24eff622caf5748f73..4e95b101d3ac01c77848bb0c1e5eb915d60a41f8 100644 (file)
--- a/include/opcode/i860.h
+++ b/include/opcode/i860.h
@@ -478,8 +478,8 @@ static const struct i860_opcode i860_opcodes[] =
 { "pfaddp",    0x48000450, 0xb40001af, "e,f,g", 0 },   /* pfaddp fsrc1,fsrc2,fdest */
 { "faddz",     0x480001d1, 0xb400042e, "e,f,g", 0 },   /* faddz fsrc1,fsrc2,fdest */
 { "pfaddz",    0x480005d1, 0xb400002e, "e,f,g", 0 },   /* pfaddz fsrc1,fsrc2,fdest */
-{ "form",      0x480001da, 0xb4000425, "e,g", 0 },     /* form fsrc1,fdest */
-{ "pform",     0x480005da, 0xb4000025, "e,g", 0 },     /* pform fsrc1,fdest */
+{ "form.dd",   0x480001da, 0xb4000425, "e,g", 0 },     /* form fsrc1,fdest */
+{ "pform.dd",  0x480005da, 0xb4000025, "e,g", 0 },     /* pform fsrc1,fdest */
 
 /* Floating point pseudo-instructions.  */
 { "fmov.ss",   0x48000049, 0xb7e005b6, "e,g", 0 },     /* fiadd.ss fsrc1,f0,fdest */