]> sourceware.org Git - newlib-cygwin.git/commitdiff
* bfd/elf32-arm.c (v8): New array.
authorMatthew Gretton-Dann <matthew.gretton-dann@arm.com>
Fri, 24 Aug 2012 07:50:37 +0000 (07:50 +0000)
committerMatthew Gretton-Dann <matthew.gretton-dann@arm.com>
Fri, 24 Aug 2012 07:50:37 +0000 (07:50 +0000)
(tag_cpu_arch_combine): Add support for ARMv8 attributes.
(elf32_arm_merge_eabi_attributes): Likewise.
(VFP_VERSION_COUNT): New define.
* binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8.
(arm_attr_tag_FP_arch): Likewise.
(arm_attr_tag_Advanced_SIMD_arch): Likewise.
* gas/config/tc-arm.h (arm_ext_v8): New variable.
(fpu_vfp_ext_armv8): Likewise.
(fpu_neon_ext_armv8): Likewise.
(fpu_crypto_ext_armv8): Likewise.
(arm_archs): Add armv8-a.
(arm_extensions): Add crypto, fp, and simd.
(arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8.
(cpu_arch_ver): Add support for ARMv8.
(aeabi_set_public_sttributes): Likewise.
* gas/doc/c-arm.texi (ARM Options): Document new architecture and
extension options for ARMv8.
* gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected
output.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase.
* gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise.
* include/elf/arm.h (TAG_CPU_ARCH_V8): New define.
(MAX_TAG_CPU_ARCH): Update.
* include/opcode/arm.h (ARM_EXT_V8): New define.
(FPU_VFP_EXT_ARMV8): Likewise.
(FPU_NEON_EXT_ARMV8): Likewise.
(FPU_CRYPTO_EXT_ARMV8): Likewise.
(ARM_AEXT_V8A): Likewise.
(FPU_VFP_ARMV8): Likwise.
(FPU_NEON_ARMV8): Likewise.
(FPU_CRYPTO_ARMV8): Likewise.
(FPU_ARCH_VFP_ARMV8): Likewise.
(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
(ARM_ARCH_V8A): Likwise.
(ARM_ARCH_V8A_FP): Likewise.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTO): Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected
output.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase.
* ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise.

include/ChangeLog
include/elf/arm.h
include/opcode/arm.h

index e8a01af15f5780157b10f9579bc71e885c73e891..58ad5ae252c14f35113db1203d935ffb60ecf2c4 100644 (file)
@@ -1,3 +1,23 @@
+2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
+
+       * elf/arm.h (TAG_CPU_ARCH_V8): New define.
+       (MAX_TAG_CPU_ARCH): Update.
+       * opcode/arm.h (ARM_EXT_V8): New define.
+       (FPU_VFP_EXT_ARMV8): Likewise.
+       (FPU_NEON_EXT_ARMV8): Likewise.
+       (FPU_CRYPTO_EXT_ARMV8): Likewise.
+       (ARM_AEXT_V8A): Likewise.
+       (FPU_VFP_ARMV8): Likwise.
+       (FPU_NEON_ARMV8): Likewise.
+       (FPU_CRYPTO_ARMV8): Likewise.
+       (FPU_ARCH_VFP_ARMV8): Likewise.
+       (FPU_ARCH_NEON_VFP_ARMV8): Likewise.
+       (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
+       (ARM_ARCH_V8A): Likwise.
+       (ARM_ARCH_V8A_FP): Likewise.
+       (ARM_ARCH_V8A_SIMD): Likewise.
+       (ARM_ARCH_V8A_CRYPTO): Likewise.
+
 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
             Laurent Desnogues  <laurent.desnogues@arm.com>
             Jim MacArthur  <jim.macarthur@arm.com>
index 860fdf77afbc440061a5c2885927f9cb61c80327..8ea3fe88100dca49e95a3601f1d680a1b78f24f7 100644 (file)
 #define TAG_CPU_ARCH_V6_M      11
 #define TAG_CPU_ARCH_V6S_M     12
 #define TAG_CPU_ARCH_V7E_M     13
-#define MAX_TAG_CPU_ARCH       13
+#define TAG_CPU_ARCH_V8                14
+#define MAX_TAG_CPU_ARCH       14
 /* Pseudo-architecture to allow objects to be compatible with the subset of
    armv4t and armv6-m.  This value should never be stored in object files.  */
 #define TAG_CPU_ARCH_V4T_PLUS_V6_M (MAX_TAG_CPU_ARCH + 1)
index 86e3d67db130fd8465df5471cd840d28cc6b7f7f..1c350c8b3bf2cd0d4894584748ffbe0f70235d41 100644 (file)
@@ -34,6 +34,7 @@
 #define ARM_EXT_V6       0x00001000     /* ARM V6.                 */
 #define ARM_EXT_V6K      0x00002000     /* ARM V6K.                */
 /*                      0x00004000        Was ARM V6Z.            */
+#define ARM_EXT_V8      0x00004000     /* is now ARMv8.           */
 #define ARM_EXT_V6T2    0x00008000     /* Thumb-2.                */
 #define ARM_EXT_DIV     0x00010000     /* Integer division.       */
 /* The 'M' in Arm V7M stands for Microcontroller.
@@ -77,6 +78,9 @@
 #define FPU_VFP_EXT_FP16 0x00100000    /* Half-precision extensions. */
 #define FPU_NEON_EXT_FMA 0x00080000    /* Neon fused multiply-add    */
 #define FPU_VFP_EXT_FMA         0x00040000     /* VFP fused multiply-add     */
+#define FPU_VFP_EXT_ARMV8 0x00020000   /* FP for ARMv8.  */
+#define FPU_NEON_EXT_ARMV8 0x00010000  /* Neon for ARMv8.  */
+#define FPU_CRYPTO_EXT_ARMV8 0x00008000        /* Crypto for ARMv8.  */
 
 /* Architectures are the sum of the base and extensions.  The ARM ARM (rev E)
    defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
 #define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
 #define ARM_AEXT_V7EM \
   (ARM_AEXT_V7M | ARM_EXT_V5ExP | ARM_EXT_V6_DSP)
+#define ARM_AEXT_V8A \
+  (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC | ARM_EXT_DIV | ARM_EXT_ADIV \
+   | ARM_EXT_VIRT | ARM_EXT_V8)
 
 /* Processors with specific extensions in the co-processor space.  */
 #define ARM_ARCH_XSCALE        ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
 #define FPU_VFP_V4D16  (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
 #define FPU_VFP_V4     (FPU_VFP_V3 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
 #define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
+#define FPU_VFP_ARMV8  (FPU_VFP_V4 | FPU_VFP_EXT_ARMV8)
+#define FPU_NEON_ARMV8 (FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA | FPU_NEON_EXT_ARMV8)
+#define FPU_CRYPTO_ARMV8 (FPU_CRYPTO_EXT_ARMV8)
 #define FPU_VFP_HARD   (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
                         | FPU_VFP_EXT_V3xD | FPU_VFP_EXT_FMA | FPU_NEON_EXT_FMA \
                          | FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_D32)
 #define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE(0, FPU_VFP_V4_SP_D16)
 #define FPU_ARCH_NEON_VFP_V4 \
   ARM_FEATURE(0, FPU_VFP_V4 | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA)
+#define FPU_ARCH_VFP_ARMV8 ARM_FEATURE(0, FPU_VFP_ARMV8)
+#define FPU_ARCH_NEON_VFP_ARMV8 ARM_FEATURE(0, FPU_NEON_ARMV8 | FPU_VFP_ARMV8)
+#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 \
+  ARM_FEATURE(0, FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8)
 
 #define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
 
 #define ARM_ARCH_V7R   ARM_FEATURE (ARM_AEXT_V7R, 0)
 #define ARM_ARCH_V7M   ARM_FEATURE (ARM_AEXT_V7M, 0)
 #define ARM_ARCH_V7EM  ARM_FEATURE (ARM_AEXT_V7EM, 0)
+#define ARM_ARCH_V8A   ARM_FEATURE (ARM_AEXT_V8A, 0)
 
 /* Some useful combinations:  */
 #define ARM_ARCH_NONE  ARM_FEATURE (0, 0)
 #define ARM_ARCH_V7R_IDIV      ARM_FEATURE (ARM_AEXT_V7R | ARM_EXT_ADIV, 0)
 /* Features that are present in v6M and v6S-M but not other v6 cores.  */
 #define ARM_ARCH_V6M_ONLY ARM_FEATURE (ARM_AEXT_V6M_ONLY, 0)
+/* v8-a+fp.  */
+#define ARM_ARCH_V8A_FP        ARM_FEATURE (ARM_AEXT_V8A, FPU_ARCH_VFP_ARMV8)
+/* v8-a+simd (implies fp).  */
+#define ARM_ARCH_V8A_SIMD      ARM_FEATURE (ARM_AEXT_V8A, \
+                                            FPU_ARCH_NEON_VFP_ARMV8)
+/* v8-a+crypto (implies simd+fp).  */
+#define ARM_ARCH_V8A_CRYPTOV1  ARM_FEATURE (ARM_AEXT_V8A, \
+                                            FPU_ARCH_CRYPTO_NEON_VFP_ARMV8)
 
 /* There are too many feature bits to fit in a single word, so use a
    structure.  For simplicity we put all core features in one word and
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