#define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \
(abort (), 0)
-#ifdef UP
-# define __ARCH_ACQ_INSTR ""
-# define __ARCH_REL_INSTR ""
-#else
-# define __ARCH_ACQ_INSTR "isync"
-# ifndef __ARCH_REL_INSTR
-# define __ARCH_REL_INSTR "sync"
-# endif
+#define __ARCH_ACQ_INSTR "isync"
+#ifndef __ARCH_REL_INSTR
+# define __ARCH_REL_INSTR "sync"
#endif
#ifndef MUTEX_HINT_ACQ
/*
* "light weight" sync can also be used for the release barrier.
*/
-# ifndef UP
-# define __ARCH_REL_INSTR "lwsync"
-# endif
+# define __ARCH_REL_INSTR "lwsync"
# define atomic_write_barrier() __asm ("lwsync" ::: "memory")
#else
/*
/*
* "light weight" sync can also be used for the release barrier.
*/
-#ifndef UP
-# define __ARCH_REL_INSTR "lwsync"
-#endif
+#define __ARCH_REL_INSTR "lwsync"
#define atomic_write_barrier() __asm ("lwsync" ::: "memory")
/*