+2004-10-07 Bob Wilson <bob.wilson@acm.org>
+
+ * xtensa-config.h (XSHAL_USE_ABSOLUTE_LITERALS,
+ XCHAL_HAVE_PREDICTED_BRANCHES, XCHAL_INST_FETCH_WIDTH): New.
+ (XCHAL_EXTRA_SA_SIZE, XCHAL_EXTRA_SA_ALIGN): Delete.
+ * xtensa-isa-internal.h (ISA_INTERFACE_VERSION): Delete.
+ (config_sturct struct): Delete.
+ (XTENSA_OPERAND_IS_REGISTER, XTENSA_OPERAND_IS_PCRELATIVE,
+ XTENSA_OPERAND_IS_INVISIBLE, XTENSA_OPERAND_IS_UNKNOWN,
+ XTENSA_OPCODE_IS_BRANCH, XTENSA_OPCODE_IS_JUMP,
+ XTENSA_OPCODE_IS_LOOP, XTENSA_OPCODE_IS_CALL,
+ XTENSA_STATE_IS_EXPORTED, XTENSA_INTERFACE_HAS_SIDE_EFFECT): Define.
+ (xtensa_format_encode_fn, xtensa_get_slot_fn, xtensa_set_slot_fn): New.
+ (xtensa_insn_decode_fn): Rename to ...
+ (xtensa_opcode_decode_fn): ... this.
+ (xtensa_immed_decode_fn, xtensa_immed_encode_fn, xtensa_do_reloc_fn,
+ xtensa_undo_reloc_fn): Update.
+ (xtensa_encoding_template_fn): Delete.
+ (xtensa_opcode_encode_fn, xtensa_format_decode_fn,
+ xtensa_length_decode_fn): New.
+ (xtensa_format_internal, xtensa_slot_internal): New types.
+ (xtensa_operand_internal): Delete operand_kind, inout, isPCRelative,
+ get_field, and set_field fields. Add name, field_id, regfile,
+ num_regs, and flags fields.
+ (xtensa_arg_internal): New type.
+ (xtensa_iclass_internal): Change operands field to array of
+ xtensa_arg_internal. Add num_stateOperands, stateOperands,
+ num_interfaceOperands, and interfaceOperands fields.
+ (xtensa_opcode_internal): Delete length, template, and iclass fields.
+ Add iclass_id, flags, encode_fns, num_funcUnit_uses, and funcUnit_uses.
+ (opname_lookup_entry): Delete.
+ (xtensa_regfile_internal, xtensa_interface_internal,
+ xtensa_funcUnit_internal, xtensa_state_internal,
+ xtensa_sysreg_internal, xtensa_lookup_entry): New.
+ (xtensa_isa_internal): Replace opcode_table field with opcodes field.
+ Change type of opname_lookup_table. Delete num_modules,
+ module_opcode_base, module_decode_fn, config, and has_density fields.
+ Add num_formats, formats, format_decode_fn, length_decode_fn,
+ num_slots, slots, num_fields, num_operands, operands, num_iclasses,
+ iclasses, num_regfiles, regfiles, num_states, states,
+ state_lookup_table, num_sysregs, sysregs, sysreg_lookup_table,
+ max_sysreg_num, sysreg_table, num_interfaces, interfaces,
+ interface_lookup_table, num_funcUnits, funcUnits and
+ funcUnit_lookup_table fields.
+ (xtensa_isa_module, xtensa_isa_modules): Delete.
+ (xtensa_isa_name_compare): New prototype.
+ (xtisa_errno, xtisa_error_msg): New.
+ * xtensa-isa.h (XTENSA_ISA_VERSION): Define.
+ (xtensa_isa): Change type.
+ (xtensa_operand): Delete.
+ (xtensa_format, xtensa_regfile, xtensa_state, xtensa_sysreg,
+ xtensa_interface, xtensa_funcUnit, xtensa_isa_status,
+ xtensa_funcUnit_use): New types.
+ (libisa_module_specifier): Delete.
+ (xtensa_isa_errno, xtensa_isa_error_msg): New prototypes.
+ (xtensa_insnbuf_free, xtensa_insnbuf_to_chars,
+ xtensa_insnbuf_from_chars): Update prototypes.
+ (xtensa_load_isa, xtensa_extend_isa, xtensa_default_isa,
+ xtensa_insn_maxlength, xtensa_num_opcodes, xtensa_decode_insn,
+ xtensa_encode_insn, xtensa_insn_length,
+ xtensa_insn_length_from_first_byte, xtensa_num_operands,
+ xtensa_operand_kind, xtensa_encode_result,
+ xtensa_operand_isPCRelative): Delete.
+ (xtensa_isa_init, xtensa_operand_inout, xtensa_operand_get_field,
+ xtensa_operand_set_field, xtensa_operand_encode,
+ xtensa_operand_decode, xtensa_operand_do_reloc,
+ xtensa_operand_undo_reloc): Update prototypes.
+ (xtensa_isa_maxlength, xtensa_isa_length_from_chars,
+ xtensa_isa_num_pipe_stages, xtensa_isa_num_formats,
+ xtensa_isa_num_opcodes, xtensa_isa_num_regfiles, xtensa_isa_num_states,
+ xtensa_isa_num_sysregs, xtensa_isa_num_interfaces,
+ xtensa_isa_num_funcUnits, xtensa_format_name, xtensa_format_lookup,
+ xtensa_format_decode, xtensa_format_encode, xtensa_format_length,
+ xtensa_format_num_slots, xtensa_format_slot_nop_opcode,
+ xtensa_format_get_slot, xtensa_format_set_slot, xtensa_opcode_decode,
+ xtensa_opcode_encode, xtensa_opcode_is_branch, xtensa_opcode_is_jump,
+ xtensa_opcode_is_loop, xtensa_opcode_is_call,
+ xtensa_opcode_num_operands, xtensa_opcode_num_stateOperands,
+ xtensa_opcode_num_interfaceOperands, xtensa_opcode_num_funcUnit_uses,
+ xtensa_opcode_funcUnit_use, xtensa_operand_name,
+ xtensa_operand_is_visible, xtensa_operand_is_register,
+ xtensa_operand_regfile, xtensa_operand_num_regs,
+ xtensa_operand_is_known_reg, xtensa_operand_is_PCrelative,
+ xtensa_stateOperand_state, xtensa_stateOperand_inout,
+ xtensa_interfaceOperand_interface, xtensa_regfile_lookup,
+ xtensa_regfile_lookup_shortname, xtensa_regfile_name,
+ xtensa_regfile_shortname, xtensa_regfile_view_parent,
+ xtensa_regfile_num_bits, xtensa_regfile_num_entries,
+ xtensa_state_lookup, xtensa_state_name, xtensa_state_num_bits,
+ xtensa_state_is_exported, xtensa_sysreg_lookup,
+ xtensa_sysreg_lookup_name, xtensa_sysreg_name, xtensa_sysreg_number,
+ xtensa_sysreg_is_user, xtensa_interface_lookup, xtensa_interface_name,
+ xtensa_interface_num_bits, xtensa_interface_inout,
+ xtensa_interface_has_side_effect, xtensa_funcUnit_lookup,
+ xtensa_funcUnit_name, xtensa_funcUnit_num_copies): New prototypes.
+ * elf/xtensa.h (R_XTENSA_DIFF8, R_XTENSA_DIFF16, R_XTENSA_DIFF32,
+ R_XTENSA_SLOT*_OP, R_XTENSA_SLOT*_ALT): New relocations.
+ (XTENSA_PROP_SEC_NAME): Define.
+ (property_table_entry): Add flags field.
+ (XTENSA_PROP_*, GET_XTENSA_PROP_*, SET_XTENSA_PROP_*): Define.
+
2004-10-07 Jeff Baker <jbaker@qnx.com>
* bfdlink.h (bfd_link_info): Add bitfield: warn_shared_textrel.
/* Xtensa ELF support for BFD.
- Copyright 2003 Free Software Foundation, Inc.
+ Copyright 2003, 2004 Free Software Foundation, Inc.
Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
This file is part of BFD, the Binary File Descriptor library.
RELOC_NUMBER (R_XTENSA_ASM_SIMPLIFY, 12)
RELOC_NUMBER (R_XTENSA_GNU_VTINHERIT, 15)
RELOC_NUMBER (R_XTENSA_GNU_VTENTRY, 16)
+ RELOC_NUMBER (R_XTENSA_DIFF8, 17)
+ RELOC_NUMBER (R_XTENSA_DIFF16, 18)
+ RELOC_NUMBER (R_XTENSA_DIFF32, 19)
+ RELOC_NUMBER (R_XTENSA_SLOT0_OP, 20)
+ RELOC_NUMBER (R_XTENSA_SLOT1_OP, 21)
+ RELOC_NUMBER (R_XTENSA_SLOT2_OP, 22)
+ RELOC_NUMBER (R_XTENSA_SLOT3_OP, 23)
+ RELOC_NUMBER (R_XTENSA_SLOT4_OP, 24)
+ RELOC_NUMBER (R_XTENSA_SLOT5_OP, 25)
+ RELOC_NUMBER (R_XTENSA_SLOT6_OP, 26)
+ RELOC_NUMBER (R_XTENSA_SLOT7_OP, 27)
+ RELOC_NUMBER (R_XTENSA_SLOT8_OP, 28)
+ RELOC_NUMBER (R_XTENSA_SLOT9_OP, 29)
+ RELOC_NUMBER (R_XTENSA_SLOT10_OP, 30)
+ RELOC_NUMBER (R_XTENSA_SLOT11_OP, 31)
+ RELOC_NUMBER (R_XTENSA_SLOT12_OP, 32)
+ RELOC_NUMBER (R_XTENSA_SLOT13_OP, 33)
+ RELOC_NUMBER (R_XTENSA_SLOT14_OP, 34)
+ RELOC_NUMBER (R_XTENSA_SLOT0_ALT, 35)
+ RELOC_NUMBER (R_XTENSA_SLOT1_ALT, 36)
+ RELOC_NUMBER (R_XTENSA_SLOT2_ALT, 37)
+ RELOC_NUMBER (R_XTENSA_SLOT3_ALT, 38)
+ RELOC_NUMBER (R_XTENSA_SLOT4_ALT, 39)
+ RELOC_NUMBER (R_XTENSA_SLOT5_ALT, 40)
+ RELOC_NUMBER (R_XTENSA_SLOT6_ALT, 41)
+ RELOC_NUMBER (R_XTENSA_SLOT7_ALT, 42)
+ RELOC_NUMBER (R_XTENSA_SLOT8_ALT, 43)
+ RELOC_NUMBER (R_XTENSA_SLOT9_ALT, 44)
+ RELOC_NUMBER (R_XTENSA_SLOT10_ALT, 45)
+ RELOC_NUMBER (R_XTENSA_SLOT11_ALT, 46)
+ RELOC_NUMBER (R_XTENSA_SLOT12_ALT, 47)
+ RELOC_NUMBER (R_XTENSA_SLOT13_ALT, 48)
+ RELOC_NUMBER (R_XTENSA_SLOT14_ALT, 49)
END_RELOC_NUMBERS (R_XTENSA_max)
/* Processor-specific flags for the ELF header e_flags field. */
#define XTENSA_INSN_SEC_NAME ".xt.insn"
#define XTENSA_LIT_SEC_NAME ".xt.lit"
+#define XTENSA_PROP_SEC_NAME ".xt.prop"
typedef struct property_table_entry_t
{
bfd_vma address;
bfd_vma size;
+ flagword flags;
} property_table_entry;
+/* Flags in the property tables to specify whether blocks of memory are
+ literals, instructions, data, or unreachable. For instructions,
+ blocks that begin loop targets and branch targets are designated.
+ Blocks that do not allow density instructions, instruction reordering
+ or transformation are also specified. Finally, for branch targets,
+ branch target alignment priority is included. Alignment of the next
+ block is specified in the current block and the size of the current
+ block does not include any fill required to align to the next
+ block. */
+
+#define XTENSA_PROP_LITERAL 0x00000001
+#define XTENSA_PROP_INSN 0x00000002
+#define XTENSA_PROP_DATA 0x00000004
+#define XTENSA_PROP_UNREACHABLE 0x00000008
+/* Instruction-only properties at beginning of code. */
+#define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010
+#define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020
+/* Instruction-only properties about code. */
+#define XTENSA_PROP_INSN_NO_DENSITY 0x00000040
+#define XTENSA_PROP_INSN_NO_REORDER 0x00000080
+#define XTENSA_PROP_INSN_NO_TRANSFORM 0x00000100
+
+/* Branch target alignment information. This transmits information
+ to the linker optimization about the priority of aligning a
+ particular block for branch target alignment: None, low priority,
+ high priority, or required. These only need to be checked in
+ instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
+ Common usage is:
+
+ switch (GET_XTENSA_PROP_BT_ALIGN(flags))
+ case XTENSA_PROP_BT_ALIGN_NONE:
+ case XTENSA_PROP_BT_ALIGN_LOW:
+ case XTENSA_PROP_BT_ALIGN_HIGH:
+ case XTENSA_PROP_BT_ALIGN_REQUIRE:
+*/
+#define XTENSA_PROP_BT_ALIGN_MASK 0x00000600
+
+/* No branch target alignment. */
+#define XTENSA_PROP_BT_ALIGN_NONE 0x0
+/* Low priority branch target alignment. */
+#define XTENSA_PROP_BT_ALIGN_LOW 0x1
+/* High priority branch target alignment. */
+#define XTENSA_PROP_BT_ALIGN_HIGH 0x2
+/* Required branch target alignment. */
+#define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3
+
+#define GET_XTENSA_PROP_BT_ALIGN(flag) \
+ (((unsigned)((flag) & (XTENSA_PROP_BT_ALIGN_MASK))) >> 9)
+#define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
+ (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
+ (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
+
+/* Alignment is specified in the block BEFORE the one that needs
+ alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to
+ get the required alignment specified as a power of 2. Use
+ SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
+ alignment. Be careful of side effects since the SET will evaluate
+ flags twice. Also, note that the SIZE of a block in the property
+ table does not include the alignment size, so the alignment fill
+ must be calculated to determine if two blocks are contiguous.
+ TEXT_ALIGN is not currently implemented but is a placeholder for a
+ possible future implementation. */
+
+#define XTENSA_PROP_ALIGN 0x00000800
+
+#define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000
+
+#define GET_XTENSA_PROP_ALIGNMENT(flag) \
+ (((unsigned)((flag) & (XTENSA_PROP_ALIGNMENT_MASK))) >> 12)
+#define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
+ (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
+ (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
+
+#define XTENSA_PROP_INSN_ABSLIT 0x00020000
+
#endif /* _ELF_XTENSA_H */
/* Internal definitions for configurable Xtensa ISA support.
- Copyright 2003 Free Software Foundation, Inc.
+ Copyright 2003, 2004 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-/* Use the statically-linked version for the GNU tools. */
-#define STATIC_LIBISA 1
+#ifndef XTENSA_ISA_INTERNAL_H
+#define XTENSA_ISA_INTERNAL_H
-#define ISA_INTERFACE_VERSION 3
+/* Flags. */
-struct config_struct
-{
- char *param_name;
- char *param_value;
-};
-
-/* Encode/decode function types for immediate operands. */
-typedef uint32 (*xtensa_immed_decode_fn) (uint32);
-typedef xtensa_encode_result (*xtensa_immed_encode_fn) (uint32 *);
-
-/* Field accessor function types. */
-typedef uint32 (*xtensa_get_field_fn) (const xtensa_insnbuf);
-typedef void (*xtensa_set_field_fn) (xtensa_insnbuf, uint32);
+#define XTENSA_OPERAND_IS_REGISTER 0x00000001
+#define XTENSA_OPERAND_IS_PCRELATIVE 0x00000002
+#define XTENSA_OPERAND_IS_INVISIBLE 0x00000004
+#define XTENSA_OPERAND_IS_UNKNOWN 0x00000008
-/* PC-relative relocation function types. */
-typedef uint32 (*xtensa_do_reloc_fn) (uint32, uint32);
-typedef uint32 (*xtensa_undo_reloc_fn) (uint32, uint32);
+#define XTENSA_OPCODE_IS_BRANCH 0x00000001
+#define XTENSA_OPCODE_IS_JUMP 0x00000002
+#define XTENSA_OPCODE_IS_LOOP 0x00000004
+#define XTENSA_OPCODE_IS_CALL 0x00000008
-/* Instruction decode function type. */
-typedef int (*xtensa_insn_decode_fn) (const xtensa_insnbuf);
+#define XTENSA_STATE_IS_EXPORTED 0x00000001
-/* Instruction encoding template function type (each of these functions
- returns a constant template; they exist only to make it easier for the
- TIE compiler to generate endian-independent DLLs). */
-typedef xtensa_insnbuf (*xtensa_encoding_template_fn) (void);
+#define XTENSA_INTERFACE_HAS_SIDE_EFFECT 0x00000001
+/* Function pointer typedefs */
+typedef void (*xtensa_format_encode_fn) (xtensa_insnbuf);
+typedef void (*xtensa_get_slot_fn) (const xtensa_insnbuf, xtensa_insnbuf);
+typedef void (*xtensa_set_slot_fn) (xtensa_insnbuf, const xtensa_insnbuf);
+typedef int (*xtensa_opcode_decode_fn) (const xtensa_insnbuf);
+typedef uint32 (*xtensa_get_field_fn) (const xtensa_insnbuf);
+typedef void (*xtensa_set_field_fn) (xtensa_insnbuf, uint32);
+typedef int (*xtensa_immed_decode_fn) (uint32 *);
+typedef int (*xtensa_immed_encode_fn) (uint32 *);
+typedef int (*xtensa_do_reloc_fn) (uint32 *, uint32);
+typedef int (*xtensa_undo_reloc_fn) (uint32 *, uint32);
+typedef void (*xtensa_opcode_encode_fn) (xtensa_insnbuf);
+typedef int (*xtensa_format_decode_fn) (const xtensa_insnbuf);
+typedef int (*xtensa_length_decode_fn) (const char *);
+
+typedef struct xtensa_format_internal_struct
+{
+ const char *name; /* Instruction format name. */
+ int length; /* Instruction length in bytes. */
+ xtensa_format_encode_fn encode_fn;
+ int num_slots;
+ int *slot_id; /* Array[num_slots] of slot IDs. */
+} xtensa_format_internal;
+
+typedef struct xtensa_slot_internal_struct
+{
+ const char *name; /* Not necessarily unique. */
+ const char *format;
+ int position;
+ xtensa_get_slot_fn get_fn;
+ xtensa_set_slot_fn set_fn;
+ xtensa_get_field_fn *get_field_fns; /* Array[field_id]. */
+ xtensa_set_field_fn *set_field_fns; /* Array[field_id]. */
+ xtensa_opcode_decode_fn opcode_decode_fn;
+ const char *nop_name;
+} xtensa_slot_internal;
typedef struct xtensa_operand_internal_struct
{
- char *operand_kind; /* e.g., "a", "f", "i", "l".... */
- char inout; /* '<', '>', or '='. */
- char isPCRelative; /* Is this a PC-relative offset? */
- xtensa_get_field_fn get_field; /* Get encoded value of the field. */
- xtensa_set_field_fn set_field; /* Set field with an encoded value. */
+ const char *name;
+ int field_id;
+ xtensa_regfile regfile; /* Register file. */
+ int num_regs; /* Usually 1; 2 for reg pairs, etc. */
+ uint32 flags; /* See XTENSA_OPERAND_* flags. */
xtensa_immed_encode_fn encode; /* Encode the operand value. */
xtensa_immed_decode_fn decode; /* Decode the value from the field. */
- xtensa_do_reloc_fn do_reloc; /* Perform a PC-relative relocation. */
+ xtensa_do_reloc_fn do_reloc; /* Perform a PC-relative reloc. */
xtensa_undo_reloc_fn undo_reloc; /* Undo a PC-relative relocation. */
} xtensa_operand_internal;
+typedef struct xtensa_arg_internal_struct
+{
+ union {
+ int operand_id; /* For normal operands. */
+ xtensa_state state; /* For stateOperands. */
+ } u;
+ char inout; /* Direction: 'i', 'o', or 'm'. */
+} xtensa_arg_internal;
typedef struct xtensa_iclass_internal_struct
{
int num_operands; /* Size of "operands" array. */
- xtensa_operand_internal **operands; /* Array of operand structures. */
-} xtensa_iclass_internal;
+ xtensa_arg_internal *operands; /* Array[num_operands]. */
+ int num_stateOperands; /* Size of "stateOperands" array. */
+ xtensa_arg_internal *stateOperands; /* Array[num_stateOperands]. */
+
+ int num_interfaceOperands; /* Size of "interfaceOperands". */
+ xtensa_interface *interfaceOperands; /* Array[num_interfaceOperands]. */
+} xtensa_iclass_internal;
typedef struct xtensa_opcode_internal_struct
{
const char *name; /* Opcode mnemonic. */
- int length; /* Length in bytes of the insn. */
- xtensa_encoding_template_fn template; /* Fn returning encoding template. */
- xtensa_iclass_internal *iclass; /* Iclass for this opcode. */
+ int iclass_id; /* Iclass for this opcode. */
+ uint32 flags; /* See XTENSA_OPCODE_* flags. */
+ xtensa_opcode_encode_fn *encode_fns; /* Array[slot_id]. */
+ int num_funcUnit_uses; /* Number of funcUnit_use entries. */
+ xtensa_funcUnit_use *funcUnit_uses; /* Array[num_funcUnit_uses]. */
} xtensa_opcode_internal;
+typedef struct xtensa_regfile_internal_struct
+{
+ const char *name; /* Full name of the regfile. */
+ const char *shortname; /* Abbreviated name. */
+ xtensa_regfile parent; /* View parent (or identity). */
+ int num_bits; /* Width of the registers. */
+ int num_entries; /* Number of registers. */
+} xtensa_regfile_internal;
+
+typedef struct xtensa_interface_internal_struct
+{
+ const char *name; /* Interface name. */
+ int num_bits; /* Width of the interface. */
+ uint32 flags; /* See XTENSA_INTERFACE_* flags. */
+ char inout; /* "i" or "o". */
+} xtensa_interface_internal;
+
+typedef struct xtensa_funcUnit_internal_struct
+{
+ const char *name; /* Functional unit name. */
+ int num_copies; /* Number of instances. */
+} xtensa_funcUnit_internal;
-typedef struct opname_lookup_entry_struct
+typedef struct xtensa_state_internal_struct
{
- const char *key; /* Opcode mnemonic. */
- xtensa_opcode opcode; /* Internal opcode number. */
-} opname_lookup_entry;
+ const char *name; /* State name. */
+ int num_bits; /* Number of state bits. */
+ uint32 flags; /* See XTENSA_STATE_* flags. */
+} xtensa_state_internal;
+typedef struct xtensa_sysreg_internal_struct
+{
+ const char *name; /* Register name. */
+ int number; /* Register number. */
+ int is_user; /* Non-zero if a "user register". */
+} xtensa_sysreg_internal;
+
+typedef struct xtensa_lookup_entry_struct
+{
+ const char *key;
+ union
+ {
+ xtensa_opcode opcode; /* Internal opcode number. */
+ xtensa_sysreg sysreg; /* Internal sysreg number. */
+ xtensa_state state; /* Internal state number. */
+ xtensa_interface intf; /* Internal interface number. */
+ xtensa_funcUnit fun; /* Internal funcUnit number. */
+ } u;
+} xtensa_lookup_entry;
typedef struct xtensa_isa_internal_struct
{
int is_big_endian; /* Endianness. */
int insn_size; /* Maximum length in bytes. */
int insnbuf_size; /* Number of insnbuf_words. */
- int num_opcodes; /* Total number for all modules. */
- xtensa_opcode_internal **opcode_table;/* Indexed by internal opcode #. */
- int num_modules; /* Number of modules (DLLs) loaded. */
- int *module_opcode_base; /* Starting opcode # for each module. */
- xtensa_insn_decode_fn *module_decode_fn; /* Decode fn for each module. */
- opname_lookup_entry *opname_lookup_table; /* Lookup table for each module. */
- struct config_struct *config; /* Table of configuration parameters. */
- int has_density; /* Is density option available? */
-} xtensa_isa_internal;
+ int num_formats;
+ xtensa_format_internal *formats;
+ xtensa_format_decode_fn format_decode_fn;
+ xtensa_length_decode_fn length_decode_fn;
-typedef struct xtensa_isa_module_struct
-{
- int (*get_num_opcodes_fn) (void);
- xtensa_opcode_internal **(*get_opcodes_fn) (void);
- int (*decode_insn_fn) (const xtensa_insnbuf);
- struct config_struct *(*get_config_table_fn) (void);
-} xtensa_isa_module;
+ int num_slots;
+ xtensa_slot_internal *slots;
+
+ int num_fields;
+
+ int num_operands;
+ xtensa_operand_internal *operands;
+
+ int num_iclasses;
+ xtensa_iclass_internal *iclasses;
+
+ int num_opcodes;
+ xtensa_opcode_internal *opcodes;
+ xtensa_lookup_entry *opname_lookup_table;
+
+ int num_regfiles;
+ xtensa_regfile_internal *regfiles;
+
+ int num_states;
+ xtensa_state_internal *states;
+ xtensa_lookup_entry *state_lookup_table;
+
+ int num_sysregs;
+ xtensa_sysreg_internal *sysregs;
+ xtensa_lookup_entry *sysreg_lookup_table;
+
+ /* The current Xtensa ISA only supports 256 of each kind of sysreg so
+ we can get away with implementing lookups with tables indexed by
+ the register numbers. If we ever allow larger sysreg numbers, this
+ may have to be reimplemented. The first entry in the following
+ arrays corresponds to "special" registers and the second to "user"
+ registers. */
+ int max_sysreg_num[2];
+ xtensa_sysreg *sysreg_table[2];
+
+ int num_interfaces;
+ xtensa_interface_internal *interfaces;
+ xtensa_lookup_entry *interface_lookup_table;
+
+ int num_funcUnits;
+ xtensa_funcUnit_internal *funcUnits;
+ xtensa_lookup_entry *funcUnit_lookup_table;
+
+} xtensa_isa_internal;
+
+extern int xtensa_isa_name_compare (const void *, const void *);
-extern xtensa_isa_module xtensa_isa_modules[];
+extern xtensa_isa_status xtisa_errno;
+extern char xtisa_error_msg[];
+#endif /* !XTENSA_ISA_INTERNAL_H */
/* Interface definition for configurable Xtensa ISA support.
- Copyright 2003 Free Software Foundation, Inc.
+ Copyright 2003, 2004 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
#ifndef XTENSA_LIBISA_H
#define XTENSA_LIBISA_H
-/* Use the statically-linked version for the GNU tools. */
-#define STATIC_LIBISA 1
-
#ifdef __cplusplus
extern "C" {
#endif
+/* Use the statically-linked version for the GNU tools. */
+#define STATIC_LIBISA 1
+
+/* Version number: This is intended to help support code that works with
+ versions of this library from multiple Xtensa releases. */
+
+#define XTENSA_ISA_VERSION 7000
+
#ifndef uint32
#define uint32 unsigned int
#endif
-/* This file defines the interface to the Xtensa ISA library. This library
- contains most of the ISA-specific information for a particular Xtensa
- processor. For example, the set of valid instructions, their opcode
- encodings and operand fields are all included here. To support Xtensa's
- configurability and user-defined instruction extensions (i.e., TIE), the
- library is initialized by loading one or more dynamic libraries; only a
- small set of interface code is present in the statically-linked portion
- of the library.
+/* This file defines the interface to the Xtensa ISA library. This
+ library contains most of the ISA-specific information for a
+ particular Xtensa processor. For example, the set of valid
+ instructions, their opcode encodings and operand fields are all
+ included here.
- This interface basically defines four abstract data types.
+ This interface basically defines a number of abstract data types.
. an instruction buffer - for holding the raw instruction bits
. ISA info - information about the ISA as a whole
- . opcode info - information about individual instructions
- . operand info - information about specific instruction operands
-
- It would be nice to implement these as classes in C++, but the library is
- implemented in C to match the expectations of the GNU tools.
- Instead, the interface defines a set of functions to access each data
- type. With the exception of the instruction buffer, the internal
- representations of the data structures are hidden. All accesses must be
- made through the functions defined here. */
+ . instruction formats - instruction size and slot structure
+ . opcodes - information about individual instructions
+ . operands - information about register and immediate instruction operands
+ . stateOperands - information about processor state instruction operands
+ . interfaceOperands - information about interface instruction operands
+ . register files - register file information
+ . processor states - internal processor state information
+ . system registers - "special registers" and "user registers"
+ . interfaces - TIE interfaces that are external to the processor
+ . functional units - TIE shared functions
+
+ The interface defines a set of functions to access each data type.
+ With the exception of the instruction buffer, the internal
+ representations of the data structures are hidden. All accesses must
+ be made through the functions defined here. */
+
+typedef struct xtensa_isa_opaque { int unused; } *xtensa_isa;
+
+
+/* Opcodes, formats, regfiles, states, sysregs, ctypes, and protos are
+ represented here using sequential integers beginning with 0. The
+ specific values are only fixed for a particular instantiation of an
+ xtensa_isa structure, so these values should only be used
+ internally. */
-typedef void* xtensa_isa;
-typedef void* xtensa_operand;
-
-
-/* Opcodes are represented here using sequential integers beginning with 0.
- The specific value used for a particular opcode is only fixed for a
- particular instantiation of an xtensa_isa structure, so these values
- should only be used internally. */
typedef int xtensa_opcode;
-
-/* Define a unique value for undefined opcodes ("static const int" doesn't
- seem to work for this because EGCS 1.0.3 on i686-Linux without -O won't
- allow it to be used as an initializer). */
-#define XTENSA_UNDEFINED -1
+typedef int xtensa_format;
+typedef int xtensa_regfile;
+typedef int xtensa_state;
+typedef int xtensa_sysreg;
+typedef int xtensa_interface;
+typedef int xtensa_funcUnit;
-typedef int libisa_module_specifier;
+/* Define a unique value for undefined items. */
-extern xtensa_isa xtensa_isa_init (void);
+#define XTENSA_UNDEFINED -1
+/* Overview of using this interface to decode/encode instructions:
+
+ Each Xtensa instruction is associated with a particular instruction
+ format, where the format defines a fixed number of slots for
+ operations. The formats for the core Xtensa ISA have only one slot,
+ but FLIX instructions may have multiple slots. Within each slot,
+ there is a single opcode and some number of associated operands.
+
+ The encoding and decoding functions operate on instruction buffers,
+ not on the raw bytes of the instructions. The same instruction
+ buffer data structure is used for both entire instructions and
+ individual slots in those instructions -- the contents of a slot need
+ to be extracted from or inserted into the buffer for the instruction
+ as a whole.
+
+ Decoding an instruction involves first finding the format, which
+ identifies the number of slots, and then decoding each slot
+ separately. A slot is decoded by finding the opcode and then using
+ the opcode to determine how many operands there are. For example:
+
+ xtensa_insnbuf_from_chars
+ xtensa_format_decode
+ for each slot {
+ xtensa_format_get_slot
+ xtensa_opcode_decode
+ for each operand {
+ xtensa_operand_get_field
+ xtensa_operand_decode
+ }
+ }
+
+ Encoding an instruction is roughly the same procedure in reverse:
+
+ xtensa_format_encode
+ for each slot {
+ xtensa_opcode_encode
+ for each operand {
+ xtensa_operand_encode
+ xtensa_operand_set_field
+ }
+ xtensa_format_set_slot
+ }
+ xtensa_insnbuf_to_chars
+*/
+
+\f
+/* Error handling. */
+
+/* Error codes. The code for the most recent error condition can be
+ retrieved with the "errno" function. For any result other than
+ xtensa_isa_ok, an error message containing additional information
+ about the problem can be retrieved using the "error_msg" function.
+ The error messages are stored in an internal buffer, which should not
+ should be freed and may be overwritten by subsequent operations. */
+
+typedef enum xtensa_isa_status_enum
+{
+ xtensa_isa_ok = 0,
+ xtensa_isa_bad_format,
+ xtensa_isa_bad_slot,
+ xtensa_isa_bad_opcode,
+ xtensa_isa_bad_operand,
+ xtensa_isa_bad_field,
+ xtensa_isa_bad_iclass,
+ xtensa_isa_bad_regfile,
+ xtensa_isa_bad_sysreg,
+ xtensa_isa_bad_state,
+ xtensa_isa_bad_interface,
+ xtensa_isa_bad_funcUnit,
+ xtensa_isa_wrong_slot,
+ xtensa_isa_no_field,
+ xtensa_isa_out_of_memory,
+ xtensa_isa_buffer_overflow,
+ xtensa_isa_internal_error,
+ xtensa_isa_bad_value
+} xtensa_isa_status;
+
+extern xtensa_isa_status
+xtensa_isa_errno (xtensa_isa isa);
+
+extern char *
+xtensa_isa_error_msg (xtensa_isa isa);
+
+\f
/* Instruction buffers. */
typedef uint32 xtensa_insnbuf_word;
typedef xtensa_insnbuf_word *xtensa_insnbuf;
-/* Get the size in words of the xtensa_insnbuf array. */
-extern int xtensa_insnbuf_size (xtensa_isa);
-/* Allocate (with malloc) an xtensa_insnbuf of the right size. */
-extern xtensa_insnbuf xtensa_insnbuf_alloc (xtensa_isa);
+/* Get the size in "insnbuf_words" of the xtensa_insnbuf array. */
-/* Release (with free) an xtensa_insnbuf of the right size. */
-extern void xtensa_insnbuf_free (xtensa_insnbuf);
+extern int
+xtensa_insnbuf_size (xtensa_isa isa);
-/* Inward and outward conversion from memory images (byte streams) to our
- internal instruction representation. */
-extern void xtensa_insnbuf_to_chars (xtensa_isa, const xtensa_insnbuf,
- char *);
-extern void xtensa_insnbuf_from_chars (xtensa_isa, xtensa_insnbuf,
- const char *);
+/* Allocate an xtensa_insnbuf of the right size. */
+extern xtensa_insnbuf
+xtensa_insnbuf_alloc (xtensa_isa isa);
-/* ISA information. */
-/* Load the ISA information from a shared library. If successful, this returns
- a value which identifies the ISA for use in subsequent calls to the ISA
- library; otherwise, it returns NULL. Multiple ISAs can be loaded to support
- heterogeneous multiprocessor systems. */
-extern xtensa_isa xtensa_load_isa (libisa_module_specifier);
+/* Release an xtensa_insnbuf. */
+
+extern void
+xtensa_insnbuf_free (xtensa_isa isa, xtensa_insnbuf buf);
+
-/* Extend an existing set of ISA information by loading an additional shared
- library of ISA information. This is primarily intended for loading TIE
- extensions. If successful, the return value is non-zero. */
-extern int xtensa_extend_isa (xtensa_isa, libisa_module_specifier);
+/* Conversion between raw memory (char arrays) and our internal
+ instruction representation. This is complicated by the Xtensa ISA's
+ variable instruction lengths. When converting to chars, the buffer
+ must contain a valid instruction so we know how many bytes to copy;
+ thus, the "to_chars" function returns the number of bytes copied or
+ XTENSA_UNDEFINED on error. The "from_chars" function first reads the
+ minimal number of bytes required to decode the instruction length and
+ then proceeds to copy the entire instruction into the buffer; if the
+ memory does not contain a valid instruction, it copies the maximum
+ number of bytes required for the longest Xtensa instruction. The
+ "num_chars" argument may be used to limit the number of bytes that
+ can be read or written. Otherwise, if "num_chars" is zero, the
+ functions may read or write past the end of the code. */
-/* The default ISA. This variable is set automatically to the ISA most
- recently loaded and is provided as a convenience. An exception is the GNU
- opcodes library, where there is a fixed interface that does not allow
- passing the ISA as a parameter and the ISA must be taken from this global
- variable. (Note: Since this variable is just a convenience, it is not
- exported when libisa is built as a DLL, due to the hassle of dealing with
- declspecs.) */
-extern xtensa_isa xtensa_default_isa;
+extern int
+xtensa_insnbuf_to_chars (xtensa_isa isa, const xtensa_insnbuf insn,
+ char *cp, int num_chars);
+
+extern void
+xtensa_insnbuf_from_chars (xtensa_isa isa, xtensa_insnbuf insn,
+ const char *cp, int num_chars);
+
+\f
+/* ISA information. */
+
+/* Initialize the ISA information. */
+
+extern xtensa_isa
+xtensa_isa_init (xtensa_isa_status *errno_p, char **error_msg_p);
/* Deallocate an xtensa_isa structure. */
-extern void xtensa_isa_free (xtensa_isa);
+
+extern void
+xtensa_isa_free (xtensa_isa isa);
+
/* Get the maximum instruction size in bytes. */
-extern int xtensa_insn_maxlength (xtensa_isa);
-/* Get the total number of opcodes for this processor. */
-extern int xtensa_num_opcodes (xtensa_isa);
+extern int
+xtensa_isa_maxlength (xtensa_isa isa);
+
+
+/* Decode the length in bytes of an instruction in raw memory (not an
+ insnbuf). This function reads only the minimal number of bytes
+ required to decode the instruction length. Returns
+ XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_isa_length_from_chars (xtensa_isa isa, const char *cp);
+
+
+/* Get the number of stages in the processor's pipeline. The pipeline
+ stage values returned by other functions in this library will range
+ from 0 to N-1, where N is the value returned by this function.
+ Note that the stage numbers used here may not correspond to the
+ actual processor hardware, e.g., the hardware may have additional
+ stages before stage 0. Returns XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_isa_num_pipe_stages (xtensa_isa isa);
+
+
+/* Get the number of various entities that are defined for this processor. */
+
+extern int
+xtensa_isa_num_formats (xtensa_isa isa);
+
+extern int
+xtensa_isa_num_opcodes (xtensa_isa isa);
+
+extern int
+xtensa_isa_num_regfiles (xtensa_isa isa);
+
+extern int
+xtensa_isa_num_states (xtensa_isa isa);
+
+extern int
+xtensa_isa_num_sysregs (xtensa_isa isa);
+
+extern int
+xtensa_isa_num_interfaces (xtensa_isa isa);
+
+extern int
+xtensa_isa_num_funcUnits (xtensa_isa isa);
+
+\f
+/* Instruction formats. */
+
+/* Get the name of a format. Returns null on error. */
+
+extern const char *
+xtensa_format_name (xtensa_isa isa, xtensa_format fmt);
+
+
+/* Given a format name, return the format number. Returns
+ XTENSA_UNDEFINED if the name is not a valid format. */
+
+extern xtensa_format
+xtensa_format_lookup (xtensa_isa isa, const char *fmtname);
+
+
+/* Decode the instruction format from a binary instruction buffer.
+ Returns XTENSA_UNDEFINED if the format is not recognized. */
+
+extern xtensa_format
+xtensa_format_decode (xtensa_isa isa, const xtensa_insnbuf insn);
+
+
+/* Set the instruction format field(s) in a binary instruction buffer.
+ All the other fields are set to zero. Returns non-zero on error. */
+
+extern int
+xtensa_format_encode (xtensa_isa isa, xtensa_format fmt, xtensa_insnbuf insn);
+
+
+/* Find the length (in bytes) of an instruction. Returns
+ XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_format_length (xtensa_isa isa, xtensa_format fmt);
+
+
+/* Get the number of slots in an instruction. Returns XTENSA_UNDEFINED
+ on error. */
+
+extern int
+xtensa_format_num_slots (xtensa_isa isa, xtensa_format fmt);
+
+
+/* Get the opcode for a no-op in a particular slot.
+ Returns XTENSA_UNDEFINED on error. */
+
+extern xtensa_opcode
+xtensa_format_slot_nop_opcode (xtensa_isa isa, xtensa_format fmt, int slot);
+
+
+/* Get the bits for a specified slot out of an insnbuf for the
+ instruction as a whole and put them into an insnbuf for that one
+ slot, and do the opposite to set a slot. Return non-zero on error. */
+
+extern int
+xtensa_format_get_slot (xtensa_isa isa, xtensa_format fmt, int slot,
+ const xtensa_insnbuf insn, xtensa_insnbuf slotbuf);
+
+extern int
+xtensa_format_set_slot (xtensa_isa isa, xtensa_format fmt, int slot,
+ xtensa_insnbuf insn, const xtensa_insnbuf slotbuf);
+
+\f
+/* Opcode information. */
/* Translate a mnemonic name to an opcode. Returns XTENSA_UNDEFINED if
the name is not a valid opcode mnemonic. */
-extern xtensa_opcode xtensa_opcode_lookup (xtensa_isa, const char *);
-/* Decode a binary instruction buffer. Returns the opcode or
- XTENSA_UNDEFINED if the instruction is illegal. */
-extern xtensa_opcode xtensa_decode_insn (xtensa_isa, const xtensa_insnbuf);
+extern xtensa_opcode
+xtensa_opcode_lookup (xtensa_isa isa, const char *opname);
-/* Opcode information. */
+/* Decode the opcode for one instruction slot from a binary instruction
+ buffer. Returns the opcode or XTENSA_UNDEFINED if the opcode is
+ illegal. */
+
+extern xtensa_opcode
+xtensa_opcode_decode (xtensa_isa isa, xtensa_format fmt, int slot,
+ const xtensa_insnbuf slotbuf);
+
-/* Set the opcode field(s) in a binary instruction buffer. The operand
- fields are set to zero. */
-extern void xtensa_encode_insn (xtensa_isa, xtensa_opcode, xtensa_insnbuf);
+/* Set the opcode field(s) for an instruction slot. All other fields
+ in the slot are set to zero. Returns non-zero if the opcode cannot
+ be encoded. */
-/* Get the mnemonic name for an opcode. */
-extern const char * xtensa_opcode_name (xtensa_isa, xtensa_opcode);
+extern int
+xtensa_opcode_encode (xtensa_isa isa, xtensa_format fmt, int slot,
+ xtensa_insnbuf slotbuf, xtensa_opcode opc);
-/* Find the length (in bytes) of an instruction. */
-extern int xtensa_insn_length (xtensa_isa, xtensa_opcode);
-/* Find the length of an instruction by looking only at the first byte. */
-extern int xtensa_insn_length_from_first_byte (xtensa_isa, char);
+/* Get the mnemonic name for an opcode. Returns null on error. */
-/* Find the number of operands for an instruction. */
-extern int xtensa_num_operands (xtensa_isa, xtensa_opcode);
+extern const char *
+xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc);
-/* Get the information about operand number "opnd" of a particular opcode. */
-extern xtensa_operand xtensa_get_operand (xtensa_isa, xtensa_opcode, int);
+/* Check various properties of opcodes. These functions return 0 if
+ the condition is false, 1 if the condition is true, and
+ XTENSA_UNDEFINED on error. The instructions are classified as
+ follows:
+
+ branch: conditional branch; may fall through to next instruction (B*)
+ jump: unconditional branch (J, JX, RET*, RF*)
+ loop: zero-overhead loop (LOOP*)
+ call: unconditional call; control returns to next instruction (CALL*)
+
+ For the opcodes that affect control flow in some way, the branch
+ target may be specified by an immediate operand or it may be an
+ address stored in a register. You can distinguish these by
+ checking if the instruction has a PC-relative immediate
+ operand. */
+
+extern int
+xtensa_opcode_is_branch (xtensa_isa isa, xtensa_opcode opc);
+
+extern int
+xtensa_opcode_is_jump (xtensa_isa isa, xtensa_opcode opc);
+
+extern int
+xtensa_opcode_is_loop (xtensa_isa isa, xtensa_opcode opc);
+
+extern int
+xtensa_opcode_is_call (xtensa_isa isa, xtensa_opcode opc);
+
+
+/* Find the number of ordinary operands, state operands, and interface
+ operands for an instruction. These return XTENSA_UNDEFINED on
+ error. */
+
+extern int
+xtensa_opcode_num_operands (xtensa_isa isa, xtensa_opcode opc);
+
+
+extern int
+xtensa_opcode_num_stateOperands (xtensa_isa isa, xtensa_opcode opc);
+
+extern int
+xtensa_opcode_num_interfaceOperands (xtensa_isa isa, xtensa_opcode opc);
+
+
+/* Get functional unit usage requirements for an opcode. Each "use"
+ is identified by a <functional unit, pipeline stage> pair. The
+ "num_funcUnit_uses" function returns the number of these "uses" or
+ XTENSA_UNDEFINED on error. The "funcUnit_use" function returns
+ a pointer to a "use" pair or null on error. */
+
+typedef struct xtensa_funcUnit_use_struct
+{
+ xtensa_funcUnit unit;
+ int stage;
+} xtensa_funcUnit_use;
+
+extern int
+xtensa_opcode_num_funcUnit_uses (xtensa_isa isa, xtensa_opcode opc);
+
+extern xtensa_funcUnit_use *
+xtensa_opcode_funcUnit_use (xtensa_isa isa, xtensa_opcode opc, int u);
+
+\f
/* Operand information. */
-/* Find the kind of operand. There are three possibilities:
- 1) PC-relative immediates (e.g., "l", "L"). These can be identified with
- the xtensa_operand_isPCRelative function.
- 2) non-PC-relative immediates ("i").
- 3) register-file short names (e.g., "a", "b", "m" and others defined
- via TIE). */
-extern char * xtensa_operand_kind (xtensa_operand);
+/* Get the name of an operand. Returns null on error. */
+
+extern const char *
+xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd);
+
+
+/* Some operands are "invisible", i.e., not explicitly specified in
+ assembly language. When assembling an instruction, you need not set
+ the values of invisible operands, since they are either hardwired or
+ derived from other field values. The values of invisible operands
+ can be examined in the same way as other operands, but remember that
+ an invisible operand may get its value from another visible one, so
+ the entire instruction must be available before examining the
+ invisible operand values. This function returns 1 if an operand is
+ visible, 0 if it is invisible, or XTENSA_UNDEFINED on error. Note
+ that whether an operand is visible is orthogonal to whether it is
+ "implicit", i.e., whether it is encoded in a field in the
+ instruction. */
+
+extern int
+xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd);
-/* Check if an operand is an input ('<'), output ('>'), or inout ('=')
+
+/* Check if an operand is an input ('i'), output ('o'), or inout ('m')
operand. Note: The output operand of a conditional assignment
- (e.g., movnez) appears here as an inout ('=') even if it is declared
- in the TIE code as an output ('>'); this allows the compiler to
- properly handle register allocation for conditional assignments. */
-extern char xtensa_operand_inout (xtensa_operand);
+ (e.g., movnez) appears here as an inout ('m') even if it is declared
+ in the TIE code as an output ('o'); this allows the compiler to
+ properly handle register allocation for conditional assignments.
+ Returns 0 on error. */
+
+extern char
+xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd);
+
/* Get and set the raw (encoded) value of the field for the specified
operand. The "set" function does not check if the value fits in the
- field; that is done by the "encode" function below. */
-extern uint32 xtensa_operand_get_field (xtensa_operand, const xtensa_insnbuf);
+ field; that is done by the "encode" function below. Both of these
+ functions return non-zero on error, e.g., if the field is not defined
+ for the specified slot. */
+
+extern int
+xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
+ xtensa_format fmt, int slot,
+ const xtensa_insnbuf slotbuf, uint32 *valp);
-extern void xtensa_operand_set_field (xtensa_operand, xtensa_insnbuf, uint32);
+extern int
+xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
+ xtensa_format fmt, int slot,
+ xtensa_insnbuf slotbuf, uint32 val);
-/* Encode and decode operands. The raw bits in the operand field
- may be encoded in a variety of different ways. These functions hide the
- details of that encoding. The encode function has a special return type
- (xtensa_encode_result) to indicate success or the reason for failure; the
- encoded value is returned through the argument pointer. The decode function
- has no possibility of failure and returns the decoded value. */
+/* Encode and decode operands. The raw bits in the operand field may
+ be encoded in a variety of different ways. These functions hide
+ the details of that encoding. The result values are returned through
+ the argument pointer. The return value is non-zero on error. */
-typedef enum
-{
- xtensa_encode_result_ok,
- xtensa_encode_result_align,
- xtensa_encode_result_not_in_table,
- xtensa_encode_result_too_low,
- xtensa_encode_result_too_high,
- xtensa_encode_result_not_ok,
- xtensa_encode_result_max = xtensa_encode_result_not_ok
-} xtensa_encode_result;
+extern int
+xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd,
+ uint32 *valp);
+
+extern int
+xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd,
+ uint32 *valp);
+
+
+/* An operand may be either a register operand or an immediate of some
+ sort (e.g., PC-relative or not). The "is_register" function returns
+ 0 if the operand is an immediate, 1 if it is a register, and
+ XTENSA_UNDEFINED on error. The "regfile" function returns the
+ regfile for a register operand, or XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd);
+
+extern xtensa_regfile
+xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd);
+
+
+/* Register operands may span multiple consecutive registers, e.g., a
+ 64-bit data type may occupy two 32-bit registers. Only the first
+ register is encoded in the operand field. This function specifies
+ the number of consecutive registers occupied by this operand. For
+ non-register operands, the return value is undefined. Returns
+ XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd);
+
+
+/* Some register operands do not completely identify the register being
+ accessed. For example, the operand value may be added to an internal
+ state value. By definition, this implies that the corresponding
+ regfile is not allocatable. Unknown registers should generally be
+ treated with worst-case assumptions. The function returns 0 if the
+ register value is unknown, 1 if known, and XTENSA_UNDEFINED on
+ error. */
+
+extern int
+xtensa_operand_is_known_reg (xtensa_isa isa, xtensa_opcode opc, int opnd);
+
+
+/* Check if an immediate operand is PC-relative. Returns 0 for register
+ operands and non-PC-relative immediates, 1 for PC-relative
+ immediates, and XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_operand_is_PCrelative (xtensa_isa isa, xtensa_opcode opc, int opnd);
+
+
+/* For PC-relative offset operands, the interpretation of the offset may
+ vary between opcodes, e.g., is it relative to the current PC or that
+ of the next instruction? The following functions are defined to
+ perform PC-relative relocations and to undo them (as in the
+ disassembler). The "do_reloc" function takes the desired address
+ value and the PC of the current instruction and sets the value to the
+ corresponding PC-relative offset (which can then be encoded and
+ stored into the operand field). The "undo_reloc" function takes the
+ unencoded offset value and the current PC and sets the value to the
+ appropriate address. The return values are non-zero on error. Note
+ that these functions do not replace the encode/decode functions; the
+ operands must be encoded/decoded separately and the encode functions
+ are responsible for detecting invalid operand values. */
+
+extern int
+xtensa_operand_do_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
+ uint32 *valp, uint32 pc);
+
+extern int
+xtensa_operand_undo_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
+ uint32 *valp, uint32 pc);
+
+\f
+/* State Operands. */
+
+/* Get the state accessed by a state operand. Returns XTENSA_UNDEFINED
+ on error. */
+
+extern xtensa_state
+xtensa_stateOperand_state (xtensa_isa isa, xtensa_opcode opc, int stOp);
+
+
+/* Check if a state operand is an input ('i'), output ('o'), or inout
+ ('m') operand. Returns 0 on error. */
+
+extern char
+xtensa_stateOperand_inout (xtensa_isa isa, xtensa_opcode opc, int stOp);
+
+\f
+/* Interface Operands. */
+
+/* Get the external interface accessed by an interface operand.
+ Returns XTENSA_UNDEFINED on error. */
+
+extern xtensa_interface
+xtensa_interfaceOperand_interface (xtensa_isa isa, xtensa_opcode opc,
+ int ifOp);
+
+\f
+/* Register Files. */
+
+/* Regfiles include both "real" regfiles and "views", where a view
+ allows a group of adjacent registers in a real "parent" regfile to be
+ viewed as a single register. A regfile view has all the same
+ properties as its parent except for its (long) name, bit width, number
+ of entries, and default ctype. You can use the parent function to
+ distinguish these two classes. */
+
+/* Look up a regfile by either its name or its abbreviated "short name".
+ Returns XTENSA_UNDEFINED on error. The "lookup_shortname" function
+ ignores "view" regfiles since they always have the same shortname as
+ their parents. */
+
+extern xtensa_regfile
+xtensa_regfile_lookup (xtensa_isa isa, const char *name);
+
+extern xtensa_regfile
+xtensa_regfile_lookup_shortname (xtensa_isa isa, const char *shortname);
+
+
+/* Get the name or abbreviated "short name" of a regfile.
+ Returns null on error. */
+
+extern const char *
+xtensa_regfile_name (xtensa_isa isa, xtensa_regfile rf);
+
+extern const char *
+xtensa_regfile_shortname (xtensa_isa isa, xtensa_regfile rf);
+
+
+/* Get the parent regfile of a "view" regfile. If the regfile is not a
+ view, the result is the same as the input parameter. Returns
+ XTENSA_UNDEFINED on error. */
+
+extern xtensa_regfile
+xtensa_regfile_view_parent (xtensa_isa isa, xtensa_regfile rf);
+
+
+/* Get the bit width of a regfile or regfile view.
+ Returns XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_regfile_num_bits (xtensa_isa isa, xtensa_regfile rf);
+
+
+/* Get the number of regfile entries. Returns XTENSA_UNDEFINED on
+ error. */
+
+extern int
+xtensa_regfile_num_entries (xtensa_isa isa, xtensa_regfile rf);
+
+\f
+/* Processor States. */
+
+/* Look up a state by name. Returns XTENSA_UNDEFINED on error. */
+
+extern xtensa_state
+xtensa_state_lookup (xtensa_isa isa, const char *name);
+
+
+/* Get the name for a processor state. Returns null on error. */
+
+extern const char *
+xtensa_state_name (xtensa_isa isa, xtensa_state st);
+
+
+/* Get the bit width for a processor state.
+ Returns XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_state_num_bits (xtensa_isa isa, xtensa_state st);
+
+
+/* Check if a state is exported from the processor core. Returns 0 if
+ the condition is false, 1 if the condition is true, and
+ XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_state_is_exported (xtensa_isa isa, xtensa_state st);
+
+\f
+/* Sysregs ("special registers" and "user registers"). */
+
+/* Look up a register by its number and whether it is a "user register"
+ or a "special register". Returns XTENSA_UNDEFINED if the sysreg does
+ not exist. */
+
+extern xtensa_sysreg
+xtensa_sysreg_lookup (xtensa_isa isa, int num, int is_user);
+
+
+/* Check if there exists a sysreg with a given name.
+ If not, this function returns XTENSA_UNDEFINED. */
+
+extern xtensa_sysreg
+xtensa_sysreg_lookup_name (xtensa_isa isa, const char *name);
+
+
+/* Get the name of a sysreg. Returns null on error. */
+
+extern const char *
+xtensa_sysreg_name (xtensa_isa isa, xtensa_sysreg sysreg);
+
+
+/* Get the register number. Returns XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_sysreg_number (xtensa_isa isa, xtensa_sysreg sysreg);
+
+
+/* Check if a sysreg is a "special register" or a "user register".
+ Returns 0 for special registers, 1 for user registers and
+ XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_sysreg_is_user (xtensa_isa isa, xtensa_sysreg sysreg);
+
+\f
+/* Interfaces. */
+
+/* Find an interface by name. The return value is XTENSA_UNDEFINED if
+ the specified interface is not found. */
+
+extern xtensa_interface
+xtensa_interface_lookup (xtensa_isa isa, const char *ifname);
+
+
+/* Get the name of an interface. Returns null on error. */
+
+extern const char *
+xtensa_interface_name (xtensa_isa isa, xtensa_interface intf);
+
+
+/* Get the bit width for an interface.
+ Returns XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_interface_num_bits (xtensa_isa isa, xtensa_interface intf);
+
+
+/* Check if an interface is an input ('i') or output ('o') with respect
+ to the Xtensa processor core. Returns 0 on error. */
+
+extern char
+xtensa_interface_inout (xtensa_isa isa, xtensa_interface intf);
+
+
+/* Check if accessing an interface has potential side effects.
+ Currently "data" interfaces have side effects and "control"
+ interfaces do not. Returns 1 if there are side effects, 0 if not,
+ and XTENSA_UNDEFINED on error. */
+
+extern int
+xtensa_interface_has_side_effect (xtensa_isa isa, xtensa_interface intf);
+
+\f
+/* Functional Units. */
+
+/* Find a functional unit by name. The return value is XTENSA_UNDEFINED if
+ the specified unit is not found. */
+
+extern xtensa_funcUnit
+xtensa_funcUnit_lookup (xtensa_isa isa, const char *fname);
-extern xtensa_encode_result xtensa_operand_encode (xtensa_operand, uint32 *);
-extern uint32 xtensa_operand_decode (xtensa_operand, uint32);
+/* Get the name of a functional unit. Returns null on error. */
+extern const char *
+xtensa_funcUnit_name (xtensa_isa isa, xtensa_funcUnit fun);
-/* For PC-relative offset operands, the interpretation of the offset may vary
- between opcodes, e.g., is it relative to the current PC or that of the next
- instruction? The following functions are defined to perform PC-relative
- relocations and to undo them (as in the disassembler). The first function
- takes the desired address and the PC of the current instruction and returns
- the unencoded value to be stored in the offset field. The second function
- takes the unencoded offset value and the current PC and returns the address.
- Note that these functions do not replace the encode/decode functions; the
- operands must be encoded/decoded separately. */
-extern int xtensa_operand_isPCRelative (xtensa_operand);
+/* Functional units may be replicated. See how many instances of a
+ particular function unit exist. Returns XTENSA_UNDEFINED on error. */
-extern uint32 xtensa_operand_do_reloc (xtensa_operand, uint32, uint32);
+extern int
+xtensa_funcUnit_num_copies (xtensa_isa isa, xtensa_funcUnit fun);
-extern uint32 xtensa_operand_undo_reloc (xtensa_operand, uint32, uint32);
#ifdef __cplusplus
}
git://sourceware.org / newlib-cygwin.git / commitdiff