+2009-05-19 DJ Delorie <dj@redhat.com>
+
+ * cpu/mep.opc: Regenerate configuration.
+ (parse_cdisp10): Only check CPU flags, not COP flags.
+ (check_configured_mach): Likewise.
+
2009-05-13 DJ Delorie <dj@redhat.com>
* intrinsics.scm (insns.md): Add RTL predicates.
break;
}
- if (MEP_CPU == EF_MEP_CPU_C5)
+ if ((MEP_CPU & EF_MEP_CPU_MASK) == EF_MEP_CPU_C5)
wide = 1;
if (strncmp (*strp, "0x0", 3) == 0
mep_config_map_struct mep_config_map[] =
{
/* config-map-start */
- /* Default entry: mep core only, all options enabled. */
- { "", 0, EF_MEP_CPU_C5, 1, 0, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x80"}, OPTION_MASK },
+ /* Default entry: first module, with all options enabled. */
+ { "", 0, EF_MEP_COP_IVC2 | EF_MEP_CPU_C5,1, 0, { 1, "\x20" }, { 1, "\x10" }, { 1, "\x8" }, { 1, "\x4" }, { 1, "\x3c" }, { 1, "\xc0" }, OPTION_MASK | (1 << CGEN_INSN_OPTIONAL_DSP_INSN) | (1 << CGEN_INSN_OPTIONAL_UCI_INSN) },
{ "default", CONFIG_DEFAULT, EF_MEP_COP_IVC2 | EF_MEP_CPU_C5, 0, 64, { 1, "\x20" }, { 1, "\x10" }, { 1, "\x8" }, { 1, "\x4" }, { 1, "\x3c" }, { 1, "\xc0" },
0
| (1 << CGEN_INSN_OPTIONAL_CP_INSN)
{
/* All base insns are supported. */
int mach = 1 << MACH_BASE;
- switch (MEP_CPU)
+ switch (MEP_CPU & EF_MEP_CPU_MASK)
{
case EF_MEP_CPU_C2:
case EF_MEP_CPU_C3: