* rl78/rl78-sim.ld: Add .saddr/.frodata section.
* rl78/rl78.ld: Likewise.
* rl78/rl78-sim.ld: Make room for virtual register banks.
* rl78/rl78.ld: Likewise.
* rl78/vregs.h: New.
* rl78-sys.h: Use it.
* rl78/swrite.S: New.
* rl78/Makefile.in: Build it.
* rl78/write.c: Use it.
+2015-01-15 DJ Delorie <dj@redhat.com>
+
+ * rl78/crt0.S: Initialize .saddr. Avoid using SEL.
+ * rl78/rl78-sim.ld: Add .saddr/.frodata section.
+ * rl78/rl78.ld: Likewise.
+ * rl78/rl78-sim.ld: Make room for virtual register banks.
+ * rl78/rl78.ld: Likewise.
+
+ * rl78/vregs.h: New.
+ * rl78-sys.h: Use it.
+ * rl78/swrite.S: New.
+ * rl78/Makefile.in: Build it.
+ * rl78/write.c: Use it.
+
2015-01-14 Stefan Wallentowitz <stefan.wallentowitz@tum.de>
* or1k/include/or1k-sprs.h: New auto-generated header file.
close.o \
read.o \
write.o \
+ swrite.o \
lseek.o \
unlink.o \
getpid.o \
;; block move to initialize .data
- ;; we're copying from 00:[_romdatastart] to 0F:[_datastart]
- ;; and our data is not in the mirrored area.
mov es, #0
-
- sel rb0 ; bank 0
- movw hl, #__datastart
- movw de, #__romdatastart
- sel rb1 ; bank 1
- movw ax, #__romdatacopysize
- shrw ax,1
-1:
+ movw bc, #__romdatacopysize
+1:
+ movw ax, bc
cmpw ax, #0
bz $1f
- decw ax
- sel rb0 ; bank 0
- movw ax, es:[de]
- movw [hl], ax
- incw de
- incw de
- incw hl
- incw hl
- sel rb1
+ decw bc
+ decw bc
+ movw ax, es:__romdatastart[bc]
+ movw __datastart[bc], ax
br $1b
-1:
- sel rb0 ; bank 0
+1:
+
+ mov es, #0
+ movw bc, #__romsaddrcopysize
+1:
+ movw ax, bc
+ cmpw ax, #0
+ bz $1f
+ decw bc
+ decw bc
+ movw ax, es:__romsaddrstart[bc]
+ movw __saddrstart[bc], ax
+ br $1b
+1:
;; block fill to .bss
- sel rb0 ; bank 0
- movw hl, #__bssstart
+ movw bc, #__bsssize
movw ax, #0
- sel rb1 ; bank 1
- movw ax, #__bsssize
- shrw ax,1
-1:
- cmpw ax, #0
+1:
+ cmpw ax, bc
bz $1f
- decw ax
- sel rb0 ; bank 0
- movw [hl], ax
- incw hl
- incw hl
- sel rb1
+ movw __bssstart[bc], ax
+ decw bc
+ decw bc
br $1b
-1:
- sel rb0 ; bank 0
-
-
+1:
call !!__rl78_init
IVEC (r) : ORIGIN = 0x00004, LENGTH = 0x0007c
OPT (r) : ORIGIN = 0x000c0, LENGTH = 0x00004
ROM (r) : ORIGIN = 0x000d8, LENGTH = 0x7ff28
- RAM (w) : ORIGIN = 0xf8000, LENGTH = 0x07ee0
- STACK (w) : ORIGIN = 0xffee0, LENGTH = 0x00002
+/* The G10 variant needs to use RAM for virtual registers. */
+ RAM (w) : ORIGIN = 0xf8000, LENGTH = 0x07e20
+ STACK (w) : ORIGIN = 0xffe20, LENGTH = 0x00002
+ SADDR (w) : ORIGIN = 0xffe20, LENGTH = 0x000a0
}
SECTIONS
PROVIDE (__stack = .);
*(.stack)
}
+
+ .saddr : {
+ . = ALIGN(2);
+ PROVIDE (__saddrstart = .);
+ *(.saddr)
+ . = ALIGN(2);
+ } >SADDR AT>ROM
+ PROVIDE(__romsaddrstart = LOADADDR(.saddr));
+ PROVIDE (__romsaddrcopysize = SIZEOF(.saddr));
.rodata (MAX(__romdatastart + __romdatacopysize, 0x1000)) : {
. = ALIGN(2);
KEEP (*(.dtors))
} > ROM
+ .frodata : {
+ *(.frodata)
+ } > ROM
+
.text :
{
PROVIDE (_start = .);
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line) }
+ .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
*/
#include "syscall.h"
-
-r8 = 0xffef0
-r9 = 0xffef1
-r10 = 0xffef2
-r11 = 0xffef3
-r12 = 0xffef4
-r13 = 0xffef5
-r14 = 0xffef6
-r15 = 0xffef7
-r16 = 0xffee8
-r17 = 0xffee9
-r18 = 0xffeea
-r19 = 0xffeeb
-r20 = 0xffeec
-r21 = 0xffeed
-r22 = 0xffeee
-r23 = 0xffeef
+#include "vregs.h"
#define SYS__exit SYS_exit
IVEC (r) : ORIGIN = 0x00004, LENGTH = 0x0007c
OPT (r) : ORIGIN = 0x000c0, LENGTH = 0x00004
ROM (r) : ORIGIN = 0x000d8, LENGTH = 0x0ff28
- RAM (w) : ORIGIN = 0xfef00, LENGTH = 0x00fe0
- STACK (w) : ORIGIN = 0xffee0, LENGTH = 0x00002
+/* The G10 variant needs to use RAM for virtual registers. */
+ RAM (w) : ORIGIN = 0xfef00, LENGTH = 0x00f20
+ STACK (w) : ORIGIN = 0xffe20, LENGTH = 0x00002
+ SADDR (w) : ORIGIN = 0xffe20, LENGTH = 0x000a0
}
SECTIONS
*(.stack)
}
+ .saddr : {
+ . = ALIGN(2);
+ PROVIDE (__saddrstart = .);
+ *(.saddr)
+ . = ALIGN(2);
+ } >SADDR AT>ROM
+ PROVIDE(__romsaddrstart = LOADADDR(.saddr));
+ PROVIDE (__romsaddrcopysize = SIZEOF(.saddr));
+
.rodata (MAX(__romdatastart + __romdatacopysize, 0x2000)) : {
. = ALIGN(2);
*(.plt)
KEEP (*(.dtors))
} > ROM
+ .frodata : {
+ *(.frodata)
+ } > ROM
+
.text :
{
PROVIDE (_start = .);
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line) }
+ .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
SDR00 = c;
}
+/* defaults to 0 unless open() is linked in */
+int _open_present;
+
int
_write(int fd, char *ptr, int len)
{
int rv = len;
+ if (_open_present && fd > 2)
+ return _SYS_write (fd, ptr, len);
+
if (!initted)
init_uart0 ();