(_FPU_GETCW): Allow gcc to generic postinc/postdec instruction. (_FPU_SETCW): Likewise.

diff --git a/sysdeps/powerpc/fpu_control.h b/sysdeps/powerpc/fpu_control.h
index cb6a772dd2015c9d7952a4381da7f3d03cac69f5..33a74fb72313e9ea159dc7958a5448aff3636f64 100644 (file)
--- a/sysdeps/powerpc/fpu_control.h
+++ b/sysdeps/powerpc/fpu_control.h
@@ -51,14 +51,14 @@ typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
 /* Macros for accessing the hardware control word.  */
 #define _FPU_GETCW(cw) ( { \
   union { double d; fpu_control_t cw[2]; } tmp __attribute__ ((__aligned__(8))); \
-  __asm__ ("mffs 0; stfd 0,%0" : "=m" (tmp.d) : : "fr0"); \
+  __asm__ ("mffs 0; stfd%U0 0,%0" : "=m" (tmp.d) : : "fr0"); \
   (cw)=tmp.cw[1]; \
   tmp.cw[1]; } )
 #define _FPU_SETCW(cw) { \
   union { double d; fpu_control_t cw[2]; } tmp __attribute__ ((__aligned__(8))); \
   tmp.cw[0] = 0xFFF80000; /* More-or-less arbitrary; this is a QNaN. */ \
   tmp.cw[1] = cw; \
-  __asm__ ("lfd 0,%0; mtfsf 255,0" : : "m" (tmp.d) : "fr0"); \
+  __asm__ ("lfd%U0 0,%0; mtfsf 255,0" : : "m" (tmp.d) : "fr0"); \
 }
 
 /* Default control word set at startup.  */