]> sourceware.org Git - glibc.git/commitdiff
powerpc64: Obviate the need for ROP protection in clone/clone3
authorSachin Monga <smonga@linux.ibm.com>
Wed, 30 Oct 2024 20:43:37 +0000 (16:43 -0400)
committerPeter Bergner <bergner@linux.ibm.com>
Wed, 30 Oct 2024 20:50:04 +0000 (16:50 -0400)
Save lr in a non-volatile register before scv in clone/clone3.
For clone, the non-volatile register was unused and already
saved/restored.  Remove the dead code from clone.

Signed-off-by: Sachin Monga <smonga@linux.ibm.com>
Reviewed-by: Peter Bergner <bergner@linux.ibm.com>
sysdeps/unix/sysv/linux/powerpc/powerpc64/clone.S
sysdeps/unix/sysv/linux/powerpc/powerpc64/clone3.S

index 164311d2bda4597f5bcc1bc34b4d7731c2441e0e..e57cb6e82e13bcaabc3bd695c60d9947e78ed626 100644 (file)
@@ -56,7 +56,6 @@ ENTRY (__clone)
 
        /* Save fn, args, stack across syscall.  */
        mr      r30,r3                  /* Function in r30.  */
-       mr      r29,r5                  /* Flags in r29.  */
        mr      r31,r6                  /* Argument in r31.  */
 
        /* 'flags' argument is first parameter to clone syscall.
@@ -77,14 +76,12 @@ ENTRY (__clone)
        CHECK_SCV_SUPPORT r28 0f
        /* This is equivalent to DO_CALL_SCV, but we cannot use the macro here
        because it uses CFI directives and we just called cfi_endproc.  */
-       mflr    r9
-       std     r9,FRAME_LR_SAVE(r1)
+       mflr    r29
        .machine "push"
        .machine "power9"
        scv     0
        .machine "pop"
-       ld      r9,FRAME_LR_SAVE(r1)
-       mtlr    r9
+       mtlr    r29
 
        /* Check for child process.  */
        /* When using scv, error is indicated by negative r3.  */
index 900c354c9c4b7559c00956cceaf7e8079160f51a..913f341d7d4072356139ef8dbd7c7f46d8000494 100644 (file)
    because it uses CFI directives and we just called cfi_endproc.  */
 # define DO_CLONE3_SVC_CALL(jumpfalse)                         \
        CHECK_SCV_SUPPORT r28 jumpfalse;                        \
-       mflr    r9;                                             \
-       std     r9, FRAME_LR_SAVE(r1);                          \
+       mflr    r31;                                            \
        .machine "push";                                        \
        .machine "power9";                                      \
        scv     0;                                              \
        .machine "pop";                                         \
-       ld      r9, FRAME_LR_SAVE(r1);                          \
-       mtlr    r9;                                             \
+       mtlr    r31;                                            \
        /* With scv an, an error is a value -4095 <= x < 0.  */ \
        cmpdi   cr1, r3, 0;                                     \
        b       1f;
@@ -66,13 +64,15 @@ ENTRY(__clone3)
 
        /* Save some regs in the "red zone".  */
 #ifdef USE_PPC_SCV
-       std     r28, -24(r1)
-       cfi_offset (r28, -24)
+       std     r28, -32(r1)
+       cfi_offset (r28, -32)
 #endif
-       std     r29, -16(r1)
-       std     r30, -8(r1)
-       cfi_offset (r29, -16)
-       cfi_offset (r30, -8)
+       std     r29, -24(r1)
+       std     r30, -16(r1)
+       std     r31, -8(r1)
+       cfi_offset (r29, -24)
+       cfi_offset (r30, -16)
+       cfi_offset (r31, -8)
 
        /* Save func and arg across syscall.  */
        mr      r30, r5         /* Function in r30.  */
@@ -132,16 +132,19 @@ L(parent):
 
        /* Parent.  Restore registers & return.  */
 #ifdef USE_PPC_SCV
-       cfi_offset (r28, -24)
-       ld      r28, -24(r1)
+       cfi_offset (r28, -32)
+       ld      r28, -32(r1)
        cfi_restore (r28)
 #endif
-       cfi_offset (r29,-16)
-       cfi_offset (r30,-8)
-       ld      r29, -16(r1)
-       ld      r30, -8(r1)
+       cfi_offset (r29,-24)
+       cfi_offset (r30,-16)
+       cfi_offset (r31,-8)
+       ld      r29, -24(r1)
+       ld      r30, -16(r1)
+       ld      r31, -8(r1)
        cfi_restore (r29)
        cfi_restore (r30)
+       cfi_restore (r31)
 
 #ifdef USE_PPC_SCV
        beq     cr1, 0f
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