Fix setting condition code for Vector Compare quad word instructions.

The vcmpgtsq., vcmpgtuq,, vcmpequq. instructions set the condition code field
6 to 0b1000 for true, 0b0010 for false.  The condition code was being set
according to the typical condition code values for equal and greater than
which is incorrect for these instructions.  The patch fixes the setting of the
condition code as specified in the instructions.

diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c
index 543fa95743cf7f9e43d098adbf4ac2f8aae6b9aa..b2ff4bfe2aa7d68b983b75558e8aada73a568d3d 100644 (file)
--- a/VEX/priv/guest_ppc_toIR.c
+++ b/VEX/priv/guest_ppc_toIR.c
@@ -29155,9 +29155,15 @@ static Bool dis_vx_quadword_arith ( UInt prefix, UInt theInstr )
 
          assign ( eq, Quad_precision_int_eq( vA, vB ) );
 
-         assign( cc, binop( Iop_Shl32,
-                            unop( Iop_1Uto32, mkexpr( eq ) ),
-                            mkU8( 1 ) ) );
+         /* if true cc = 0b0100, if flase cc= 0b0010 */
+         assign( cc, binop( Iop_Or32,
+                            binop( Iop_Shl32,
+                                   unop( Iop_1Uto32, mkexpr( eq ) ),
+                                   mkU8( 3 ) ),
+                            binop( Iop_Shl32,
+                                   unop( Iop_1Uto32,
+                                         unop( Iop_Not1, mkexpr( eq ) ) ),
+                                   mkU8( 1 ) ) ) );
 
          if (Rc) putGST_field( PPC_GST_CR, mkexpr( cc ), cc_field );
 
@@ -29190,10 +29196,15 @@ static Bool dis_vx_quadword_arith ( UInt prefix, UInt theInstr )
             assign ( gt, Quad_precision_sint_gt( vA, vB ) );
          }
 
-         assign( cc, binop( Iop_Shl32,
-                            unop( Iop_1Uto32, mkexpr( gt ) ),
-                            mkU8( 2 ) ) );
-
+         /* if true cc = 0b0100, if flase cc= 0b0010 */
+         assign( cc, binop( Iop_Or32,
+                            binop( Iop_Shl32,
+                                   unop( Iop_1Uto32, mkexpr( gt ) ),
+                                   mkU8( 3 ) ),
+                            binop( Iop_Shl32,
+                                   unop( Iop_1Uto32,
+                                         unop( Iop_Not1, mkexpr( gt ) ) ),
+                                   mkU8( 1 ) ) ) );
          if (Rc) putGST_field( PPC_GST_CR, mkexpr( cc ), cc_field );
 
          putVReg( vT_addr, binop( Iop_64HLtoV128,