Correct cvtps2dq, movdq2q, movq2dq, and movq problems.

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 863713a64cc874801f33fb1a18444731c0d7f628..14b2193d0468e7893e4256898e2cf9221358e1f0 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,9 @@
+2001-05-12  Alan Modra  <amodra@one.net.au>
+
+       * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
+       not an mmx reg.  Swap xmm/mmx regs on both movdq2q and movq2dq,
+       and use InvMem as these insns must have register operands.
+
 2001-05-04  Alan Modra  <amodra@one.net.au>
 
        * i386.h (i386_optab): Move InvMem to first operand of pmovmskb

diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index 360974856875463a42a7c62f5c70b2af65b63436..38de44aca0a1b837064cc18eedde2f625c035d82 100644 (file)
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -1254,7 +1254,7 @@ static const template i386_optab[] = {
 {"cvtpd2pi",  2, 0x660f2d,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegMMX, 0 } },
 {"cvtpd2ps",  2, 0x660f5a,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"cvtps2pd",  2, 0x0f5a,    X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
-{"cvtps2dq",  2, 0x660f5b,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegMMX, 0 } },
+{"cvtps2dq",  2, 0x660f5b,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"cvtsd2si",  2, 0xf20f2d,  X, CpuSSE2, lq_Suf|IgnoreSize|Modrm,{ RegXMM|LLongMem, Reg32|Reg64, 0 } },
 {"cvtsd2ss",  2, 0xf20f5a,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"cvtss2sd",  2, 0xf30f5a,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
@@ -1267,8 +1267,8 @@ static const template i386_optab[] = {
 {"movdqa",    2, 0x660f7f,  X, CpuSSE2, FP|Modrm,      { RegXMM, RegXMM|LLongMem, 0 } },
 {"movdqu",    2, 0xf30f6f,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegXMM, 0 } },
 {"movdqu",    2, 0xf30f7f,  X, CpuSSE2, FP|Modrm,      { RegXMM, RegXMM|LLongMem, 0 } },
-{"movdq2q",    2, 0xf20fd6,  X, CpuSSE2, FP|Modrm,     { RegMMX|LLongMem, RegXMM, 0 } },
-{"movq2dq",   2, 0xf30fd6,  X, CpuSSE2, FP|Modrm,      { RegXMM|LLongMem, RegMMX, 0 } },
+{"movdq2q",    2, 0xf20fd6,  X, CpuSSE2, FP|Modrm,     { RegXMM|InvMem, RegMMX, 0 } },
+{"movq2dq",   2, 0xf30fd6,  X, CpuSSE2, FP|Modrm,      { RegMMX|InvMem, RegXMM, 0 } },
 {"pmuludq",   2, 0x0ff4,    X, CpuSSE2, FP|Modrm,      { RegMMX|LongMem, RegMMX, 0 } },
 {"pmuludq",   2, 0x660ff4,  X, CpuSSE2, FP|Modrm,      { RegXMM|LongMem, RegXMM, 0 } },
 {"pshufd",    3, 0x660f70,  X, CpuSSE2, FP|Modrm,      { Imm8, RegXMM|LLongMem, RegXMM } },