Do not raise "inexact" from powerpc32 ceil, floor, trunc (bug 15479).

Continuing fixes for ceil, floor and trunc functions not to raise the
"inexact" exception, this patch fixes the versions used on older
powerpc32 processors.  As was done with the round implementations some
time ago, the save of floating-point state is moved after the first
floating-point operation on the input to ensure that any "invalid"
exception from signaling NaN input is included in the saved state, and
then the whole state gets restored rather than just the rounding mode.

This has no effect on configurations using the power5+ code, since
such processors can do these operations with a single instruction (and
those instructions do not set "inexact", so are correct for TS 18661-1
semantics).

Tested for powerpc32.

	[BZ #15479]
	* sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Move save of
	floating-point state after first floating-point operation on
	input.  Restore full floating-point state instead of just rounding
	mode.
	* sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise.
	* sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.

diff --git a/ChangeLog b/ChangeLog
index 1ecd6d5ab98e73d56fec89649b4c92a7de822b84..456457180945cae872a9f040100179ec390698b2 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,16 @@
+2016-05-25  Joseph Myers  <joseph@codesourcery.com>
+
+       [BZ #15479]
+       * sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Move save of
+       floating-point state after first floating-point operation on
+       input.  Restore full floating-point state instead of just rounding
+       mode.
+       * sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise.
+       * sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.
+
 2016-05-25  Stefan Liebler  <stli@linux.vnet.ibm.com>
 
        [BZ #19727]

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_ceil.S b/sysdeps/powerpc/powerpc32/fpu/s_ceil.S
index 48d6d0de195762ac2390c68aa3cc6c53bc834834..07d031e22ee7f4f89144e73ec654f8ded5cb264f 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_ceil.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_ceil.S
@@ -26,7 +26,6 @@
 
        .section        ".text"
 ENTRY (__ceil)
-       mffs    fp11            /* Save current FPU rounding mode.  */
 #ifdef SHARED
        mflr    r11
        cfi_register(lr,r11)
@@ -42,6 +41,8 @@ ENTRY (__ceil)
        fabs    fp0,fp1
        fsub    fp12,fp13,fp13  /* generate 0.0  */
        fcmpu   cr7,fp0,fp13    /* if (fabs(x) > TWO52)  */
+       mffs    fp11            /* Save current FPU rounding mode and
+                                  "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
        bnllr-  cr7
        mtfsfi  7,2             /* Set rounding mode toward +inf.  */
@@ -50,7 +51,8 @@ ENTRY (__ceil)
        fsub    fp1,fp1,fp13    /* x-= TWO52;  */
        fabs    fp1,fp1         /* if (x == 0.0)  */
                                /* x = 0.0; */
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
 .L4:
        bge-    cr6,.L9         /* if (x < 0.0)  */
@@ -59,7 +61,8 @@ ENTRY (__ceil)
        fnabs   fp1,fp1         /* if (x == 0.0)  */
                                /* x = -0.0; */
 .L9:
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
        END (__ceil)
 

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S
index c70fd444e234dcee80450bba48187ae201390fde..3987e24e41a5fb811b2b52efe0d80a66793ec439 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S
@@ -25,7 +25,6 @@
 
        .section        ".text"
 ENTRY (__ceilf)
-       mffs    fp11            /* Save current FPU rounding mode.  */
 #ifdef SHARED
        mflr    r11
        cfi_register(lr,r11)
@@ -41,6 +40,8 @@ ENTRY (__ceilf)
        fabs    fp0,fp1
        fsubs   fp12,fp13,fp13  /* generate 0.0  */
        fcmpu   cr7,fp0,fp13    /* if (fabs(x) > TWO23)  */
+       mffs    fp11            /* Save current FPU rounding mode and
+                                  "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
        bnllr-  cr7
        mtfsfi  7,2             /* Set rounding mode toward +inf.  */
@@ -49,7 +50,8 @@ ENTRY (__ceilf)
        fsubs   fp1,fp1,fp13    /* x-= TWO23;  */
        fabs    fp1,fp1         /* if (x == 0.0)  */
                                /* x = 0.0; */
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
 .L4:
        bge-    cr6,.L9         /* if (x < 0.0)  */
@@ -58,7 +60,8 @@ ENTRY (__ceilf)
        fnabs   fp1,fp1         /* if (x == 0.0)  */
                                /* x = -0.0; */
 .L9:
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
        END (__ceilf)
 

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_floor.S b/sysdeps/powerpc/powerpc32/fpu/s_floor.S
index 3f84465a8e813c3d7c54a4330bda1e38e0a80861..b951666bd7cc126aa81560c3905aaf7b6fed1f4c 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_floor.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_floor.S
@@ -26,7 +26,6 @@
 
        .section        ".text"
 ENTRY (__floor)
-       mffs    fp11            /* Save current FPU rounding mode.  */
 #ifdef SHARED
        mflr    r11
        cfi_register(lr,r11)
@@ -42,6 +41,8 @@ ENTRY (__floor)
        fabs    fp0,fp1
        fsub    fp12,fp13,fp13  /* generate 0.0  */
        fcmpu   cr7,fp0,fp13    /* if (fabs(x) > TWO52)  */
+       mffs    fp11            /* Save current FPU rounding mode and
+                                  "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
        bnllr-  cr7
        mtfsfi  7,3             /* Set rounding mode toward -inf.  */
@@ -50,7 +51,8 @@ ENTRY (__floor)
        fsub    fp1,fp1,fp13    /* x-= TWO52;  */
        fabs    fp1,fp1         /* if (x == 0.0)  */
                                /* x = 0.0; */
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
 .L4:
        bge-    cr6,.L9         /* if (x < 0.0)  */
@@ -59,7 +61,8 @@ ENTRY (__floor)
        fnabs   fp1,fp1         /* if (x == 0.0)  */
                                /* x = -0.0; */
 .L9:
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
        END (__floor)
 

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_floorf.S b/sysdeps/powerpc/powerpc32/fpu/s_floorf.S
index 55ac526d71a4020eca303cecfbb575ef462701d3..64b87b1cc14dffb34d329ee00af6264e5fc2a9d8 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_floorf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_floorf.S
@@ -25,7 +25,6 @@
 
        .section        ".text"
 ENTRY (__floorf)
-       mffs    fp11            /* Save current FPU rounding mode.  */
 #ifdef SHARED
        mflr    r11
        cfi_register(lr,r11)
@@ -41,6 +40,8 @@ ENTRY (__floorf)
        fabs    fp0,fp1
        fsubs   fp12,fp13,fp13  /* generate 0.0  */
        fcmpu   cr7,fp0,fp13    /* if (fabs(x) > TWO23)  */
+       mffs    fp11            /* Save current FPU rounding mode and
+                                  "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
        bnllr-  cr7
        mtfsfi  7,3             /* Set rounding mode toward -inf.  */
@@ -49,7 +50,8 @@ ENTRY (__floorf)
        fsubs   fp1,fp1,fp13    /* x-= TWO23;  */
        fabs    fp1,fp1         /* if (x == 0.0)  */
                                /* x = 0.0; */
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
 .L4:
        bge-    cr6,.L9         /* if (x < 0.0)  */
@@ -58,7 +60,8 @@ ENTRY (__floorf)
        fnabs   fp1,fp1         /* if (x == 0.0)  */
                                /* x = -0.0; */
 .L9:
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
        END (__floorf)
 

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_trunc.S b/sysdeps/powerpc/powerpc32/fpu/s_trunc.S
index c8aa2fb2455b0e1ba4f549e64b04378292d0c903..260b4fd336c16801c4299d9ea459adafb98cffe7 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_trunc.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_trunc.S
@@ -33,7 +33,6 @@
 
        .section        ".text"
 ENTRY (__trunc)
-       mffs    fp11            /* Save current FPU rounding mode.  */
 #ifdef SHARED
        mflr    r11
        cfi_register(lr,r11)
@@ -49,6 +48,8 @@ ENTRY (__trunc)
        fabs    fp0,fp1
        fsub    fp12,fp13,fp13  /* generate 0.0  */
        fcmpu   cr7,fp0,fp13    /* if (fabs(x) > TWO52)  */
+       mffs    fp11            /* Save current FPU rounding mode and
+                                  "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
        bnllr-  cr7
        mtfsfi  7,1             /* Set rounding toward 0 mode.  */
@@ -57,7 +58,8 @@ ENTRY (__trunc)
        fsub    fp1,fp1,fp13    /* x-= TWO52;  */
        fabs    fp1,fp1         /* if (x == 0.0)  */
                                /* x = 0.0; */
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
 .L4:
        bge-    cr6,.L9         /* if (x < 0.0)  */
@@ -66,7 +68,8 @@ ENTRY (__trunc)
        fnabs   fp1,fp1         /* if (x == 0.0)  */
                                /* x = -0.0; */
 .L9:
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
        END (__trunc)
 

diff --git a/sysdeps/powerpc/powerpc32/fpu/s_truncf.S b/sysdeps/powerpc/powerpc32/fpu/s_truncf.S
index e47ee96c555f3630232dc740a329c8a12e7be8c2..6c2c959e711f6b95719c1f3dd3e5a858cb0eff32 100644 (file)
--- a/sysdeps/powerpc/powerpc32/fpu/s_truncf.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_truncf.S
@@ -32,7 +32,6 @@
 
        .section        ".text"
 ENTRY (__truncf)
-       mffs    fp11            /* Save current FPU rounding mode.  */
 #ifdef SHARED
        mflr    r11
        cfi_register(lr,r11)
@@ -48,6 +47,8 @@ ENTRY (__truncf)
        fabs    fp0,fp1
        fsubs   fp12,fp13,fp13  /* generate 0.0  */
        fcmpu   cr7,fp0,fp13    /* if (fabs(x) > TWO23)  */
+       mffs    fp11            /* Save current FPU rounding mode and
+                                  "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
        bnllr-  cr7
        mtfsfi  7,1             /* Set rounding toward 0 mode.  */
@@ -56,7 +57,8 @@ ENTRY (__truncf)
        fsubs   fp1,fp1,fp13    /* x-= TWO23;  */
        fabs    fp1,fp1         /* if (x == 0.0)  */
                                /* x = 0.0; */
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
 .L4:
        bge-    cr6,.L9         /* if (x < 0.0)  */
@@ -65,7 +67,8 @@ ENTRY (__truncf)
        fnabs   fp1,fp1         /* if (x == 0.0)  */
                                /* x = -0.0; */
 .L9:
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
        END (__truncf)