]> sourceware.org Git - cgen.git/commitdiff
2001-07-05 Ben Elliston <bje@redhat.com>
authorBen Elliston <bje@air.not.au>
Thu, 5 Jul 2001 12:54:37 +0000 (12:54 +0000)
committerBen Elliston <bje@air.not.au>
Thu, 5 Jul 2001 12:54:37 +0000 (12:54 +0000)
* sid.scm (sim-finish!): Read .sim files from srcdir/cpu.

ChangeLog
cpu/arm.sim [moved from arm.sim with 100% similarity]
sid.scm

index a403dee46b2f474a4062923513825a7bed597cb0..f22974bdd6803d0f4dd01d91cdcd55af70c0d732 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -4,6 +4,7 @@
 
        * read.scm (include): Include files from srcdir/cpu.
        (-cgen): Likewise for loading .cpu files.
+       * sid.scm (sim-finish!): Read .sim files from srcdir/cpu.
        * *.cpu: Move all cpu descriptions into cpu subdirectory.
        * *.opc: Likewise.
        * simplify.inc: Likewise.
similarity index 100%
rename from arm.sim
rename to cpu/arm.sim
diff --git a/sid.scm b/sid.scm
index 867c12d825b12b6c10a624ce4c8756f537a07491..1be32d38d3daf261529a31cb9e9f4a4ab4fc7a24 100644 (file)
--- a/sid.scm
+++ b/sid.scm
     '(comment "write hardware elements via cover functions/methods"))
 
   ; If there is a .sim file, load it.
-  (let ((sim-file (string-append srcdir "/" (current-arch-name) ".sim")))
+  (let ((sim-file (string-append srcdir "/cpu/" (current-arch-name) ".sim")))
     (if (file-exists? sim-file)
        (begin
          (display (string-append "Loading sim file " sim-file " ...\n"))
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