+2019-03-29 Paul A. Clarke <pc@us.ibm.com>
+
+ * sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_register): Replace inline
+ asm with builtin.
+ * sysdeps/powerpc/powerpc64/le/fpu/sfp-machine.h (FP_INIT_ROUNDMODE):
+ Likewise.
+ * sysdeps/powerpc/fpu/tst-setcontext-fpscr.c (_GET_DI_FPSCR): Likewise.
+ (_GET_SI_FPSCR): Likewise.
+ (_SET_SI_FPSCR): Likewise.
+
2019-03-26 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* math/math.h (fpclassify, isfinite, isnormal, isnan): Use builtin for
/* Equivalent to fegetenv, but returns a fenv_t instead of taking a
pointer. */
-#define fegetenv_register() \
- ({ fenv_t env; asm volatile ("mffs %0" : "=f" (env)); env; })
+#define fegetenv_register() __builtin_mffs()
/* Equivalent to fesetenv, but takes a fenv_t instead of a pointer. */
#define fesetenv_register(env) \
"mtfsf 0xff,%0,1,0; " \
".machine pop" : : "f" (d)); \
else \
- asm volatile ("mtfsf 0xff,%0" : : "f" (d)); \
+ __builtin_mtfsf (0xff, d); \
} while(0)
/* This very handy macro:
/* Macros for accessing the hardware control word on Power6[x]. */
#define _GET_DI_FPSCR(__fpscr) \
({union { double d; di_fpscr_t fpscr; } u; \
- register double fr; \
- __asm__ ("mffs %0" : "=f" (fr)); \
- u.d = fr; \
+ u.d = __builtin_mffs (); \
(__fpscr) = u.fpscr; \
u.fpscr; \
})
# define _GET_SI_FPSCR(__fpscr) \
({union { double d; di_fpscr_t fpscr; } u; \
- register double fr; \
- __asm__ ("mffs %0" : "=f" (fr)); \
- u.d = fr; \
+ u.d = __builtin_mffs (); \
(__fpscr) = (si_fpscr_t) u.fpscr; \
(si_fpscr_t) u.fpscr; \
})
u.fpscr = 0xfff80000ULL << 32; \
u.fpscr |= __fpscr & 0xffffffffULL; \
fr = u.d; \
- __asm__ ("mtfsf 255,%0" : : "f" (fr)); \
+ __builtin_mtfsf (255, fr); \
fr = 0.0; \
}
#define FP_INIT_ROUNDMODE \
do { \
- __asm__ __volatile__ ("mffs %0" \
- : "=f" (_fpscr.d)); \
+ _fpscr.d = __builtin_mffs (); \
} while (0)
# define FP_ROUNDMODE (_fpscr.i & FP_RND_MASK)