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(parent: bc6d79f) | patch
aarch64: Improve special-case handling in AdvSIMD double-precision libmvec routines
authorJoe Ramsay <Joe.Ramsay@arm.com>
Mon, 27 Nov 2023 17:02:55 +0000 (17:02 +0000)
committerSzabolcs Nagy <szabolcs.nagy@arm.com>
Wed, 29 Nov 2023 15:03:36 +0000 (15:03 +0000)
commit7b12776584c51dbecb1033e107f6b9f45de47a1b
treee1a1fa3bb711f55a55d6c18b51f8f5945fc0aa4ctree
parentbc6d79f4ae99206e7ec7d6a8c5abf26cdefc8bffcommit | diff
aarch64: Improve special-case handling in AdvSIMD double-precision libmvec routines

Avoids emitting many saves/restores of vector registers, reduces the
amount of code generated around the scalar fallback.
sysdeps/aarch64/fpu/v_math.h diff | blob | blame | history
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