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1 /* Copyright (C) 1999, 2001-2002, 2006, 2012 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
3
4 The GNU C Library is free software; you can redistribute it and/or
5 modify it under the terms of the GNU Lesser General Public
6 License as published by the Free Software Foundation; either
7 version 2.1 of the License, or (at your option) any later version.
8
9 The GNU C Library is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 Lesser General Public License for more details.
13
14 You should have received a copy of the GNU Lesser General Public
15 License along with the GNU C Library; if not, see
16 <http://www.gnu.org/licenses/>. */
17
18 /*
19 * Powerpc Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP).
20 * This entry is copied to _dl_hwcap or rtld_global._dl_hwcap during startup.
21 * The following must match the kernels linux/asm/cputable.h.
22 */
23 #define PPC_FEATURE_32 0x80000000 /* 32-bit mode. */
24 #define PPC_FEATURE_64 0x40000000 /* 64-bit mode. */
25 #define PPC_FEATURE_601_INSTR 0x20000000 /* 601 chip, Old POWER ISA. */
26 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000 /* SIMD/Vector Unit. */
27 #define PPC_FEATURE_HAS_FPU 0x08000000 /* Floating Point Unit. */
28 #define PPC_FEATURE_HAS_MMU 0x04000000 /* Memory Management Unit. */
29 #define PPC_FEATURE_HAS_4xxMAC 0x02000000 /* 4xx Multiply Accumulator. */
30 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000 /* Unified I/D cache. */
31 #define PPC_FEATURE_HAS_SPE 0x00800000 /* Signal Processing ext. */
32 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 /* SPE Float. */
33 #define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 /* SPE Double. */
34 #define PPC_FEATURE_NO_TB 0x00100000 /* 601/403gx have no timebase */
35 #define PPC_FEATURE_POWER4 0x00080000 /* POWER4 ISA 2.00 */
36 #define PPC_FEATURE_POWER5 0x00040000 /* POWER5 ISA 2.02 */
37 #define PPC_FEATURE_POWER5_PLUS 0x00020000 /* POWER5+ ISA 2.03 */
38 #define PPC_FEATURE_CELL_BE 0x00010000 /* CELL Broadband Engine */
39 #define PPC_FEATURE_BOOKE 0x00008000
40 #define PPC_FEATURE_SMT 0x00004000 /* Simultaneous Multi-Threading */
41 #define PPC_FEATURE_ICACHE_SNOOP 0x00002000
42 #define PPC_FEATURE_ARCH_2_05 0x00001000 /* ISA 2.05 */
43 #define PPC_FEATURE_PA6T 0x00000800 /* PA Semi 6T Core */
44 #define PPC_FEATURE_HAS_DFP 0x00000400 /* Decimal FP Unit */
45 #define PPC_FEATURE_POWER6_EXT 0x00000200 /* P6 + mffgpr/mftgpr */
46 #define PPC_FEATURE_ARCH_2_06 0x00000100 /* ISA 2.06 */
47 #define PPC_FEATURE_HAS_VSX 0x00000080 /* P7 Vector Extension. */
48 #define PPC_FEATURE_970 (PPC_FEATURE_POWER4 + PPC_FEATURE_HAS_ALTIVEC)
49
50 #ifdef __ASSEMBLER__
51
52 /* Symbolic names for the registers. The only portable way to write asm
53 code is to use number but this produces really unreadable code.
54 Therefore these symbolic names. */
55
56 /* Integer registers. */
57 #define r0 0
58 #define r1 1
59 #define r2 2
60 #define r3 3
61 #define r4 4
62 #define r5 5
63 #define r6 6
64 #define r7 7
65 #define r8 8
66 #define r9 9
67 #define r10 10
68 #define r11 11
69 #define r12 12
70 #define r13 13
71 #define r14 14
72 #define r15 15
73 #define r16 16
74 #define r17 17
75 #define r18 18
76 #define r19 19
77 #define r20 20
78 #define r21 21
79 #define r22 22
80 #define r23 23
81 #define r24 24
82 #define r25 25
83 #define r26 26
84 #define r27 27
85 #define r28 28
86 #define r29 29
87 #define r30 30
88 #define r31 31
89
90 /* Floating-point registers. */
91 #define fp0 0
92 #define fp1 1
93 #define fp2 2
94 #define fp3 3
95 #define fp4 4
96 #define fp5 5
97 #define fp6 6
98 #define fp7 7
99 #define fp8 8
100 #define fp9 9
101 #define fp10 10
102 #define fp11 11
103 #define fp12 12
104 #define fp13 13
105 #define fp14 14
106 #define fp15 15
107 #define fp16 16
108 #define fp17 17
109 #define fp18 18
110 #define fp19 19
111 #define fp20 20
112 #define fp21 21
113 #define fp22 22
114 #define fp23 23
115 #define fp24 24
116 #define fp25 25
117 #define fp26 26
118 #define fp27 27
119 #define fp28 28
120 #define fp29 29
121 #define fp30 30
122 #define fp31 31
123
124 /* Condition code registers. */
125 #define cr0 0
126 #define cr1 1
127 #define cr2 2
128 #define cr3 3
129 #define cr4 4
130 #define cr5 5
131 #define cr6 6
132 #define cr7 7
133
134 /* Vector registers. */
135 #define v0 0
136 #define v1 1
137 #define v2 2
138 #define v3 3
139 #define v4 4
140 #define v5 5
141 #define v6 6
142 #define v7 7
143 #define v8 8
144 #define v9 9
145 #define v10 10
146 #define v11 11
147 #define v12 12
148 #define v13 13
149 #define v14 14
150 #define v15 15
151 #define v16 16
152 #define v17 17
153 #define v18 18
154 #define v19 19
155 #define v20 20
156 #define v21 21
157 #define v22 22
158 #define v23 23
159 #define v24 24
160 #define v25 25
161 #define v26 26
162 #define v27 27
163 #define v28 28
164 #define v29 29
165 #define v30 30
166 #define v31 31
167
168 #define VRSAVE 256
169
170
171 /* This seems to always be the case on PPC. */
172 #define ALIGNARG(log2) log2
173 /* For ELF we need the `.type' directive to make shared libs work right. */
174 #define ASM_TYPE_DIRECTIVE(name,typearg) .type name,typearg;
175 #define ASM_SIZE_DIRECTIVE(name) .size name,.-name
176
177 #endif /* __ASSEMBLER__ */
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