sysdeps/powerpc/bits/fenv.h

   1 /* Copyright (C) 1997 Free Software Foundation, Inc.
   2    This file is part of the GNU C Library.
   3
   4    The GNU C Library is free software; you can redistribute it and/or
   5    modify it under the terms of the GNU Library General Public License as
   6    published by the Free Software Foundation; either version 2 of the
   7    License, or (at your option) any later version.
   8
   9    The GNU C Library is distributed in the hope that it will be useful,
  10    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12    Library General Public License for more details.
  13
  14    You should have received a copy of the GNU Library General Public
  15    License along with the GNU C Library; see the file COPYING.LIB.  If not,
  16    write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
  17    Boston, MA 02111-1307, USA.  */
  18
  19 #ifndef _FENV_H
  20 # error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
  21 #endif
  22
  23
  24 /* Define bits representing the exception.  We use the bit positions of
  25    the appropriate bits in the FPSCR...  */
  26 enum
  27   {
  28     FE_INEXACT = 1 << 31-6,
  29 #define FE_INEXACT      FE_INEXACT
  30     FE_DIVBYZERO = 1 << 31-5,
  31 #define FE_DIVBYZERO    FE_DIVBYZERO
  32     FE_UNDERFLOW = 1 << 31-4,
  33 #define FE_UNDERFLOW    FE_UNDERFLOW
  34     FE_OVERFLOW = 1 << 31-3,
  35 #define FE_OVERFLOW     FE_OVERFLOW
  36
  37     /* ... except for FE_INVALID, for which we use bit 31. FE_INVALID
  38        actually corresponds to bits 7 through 12 and 21 through 23
  39        in the FPSCR, but we can't use that because the current draft
  40        says that it must be a power of 2.  Instead we use bit 24 which
  41        is the enable bit for all the FE_INVALID exceptions.  */
  42     FE_INVALID = 1 << 31-24,
  43 #define FE_INVALID      FE_INVALID
  44
  45 #ifdef __USE_GNU
  46     /* Breakdown of the FE_INVALID bits. Setting FE_INVALID on an
  47        input to a routine is equivalent to setting all of these bits;
  48        FE_INVALID will be set on output from a routine iff one of
  49        these bits is set.  Note, though, that you can't disable or
  50        enable these exceptions individually.  */
  51
  52     /* Operation with SNaN. */
  53     FE_INVALID_SNAN = 1 << 31-7,
  54 #define FE_INVALID_SNAN FE_INVALID_SNAN
  55
  56     /* Inf - Inf */
  57     FE_INVALID_ISI = 1 << 31-8,
  58 #define FE_INVALID_ISI  FE_INVALID_ISI
  59
  60     /* Inf / Inf */
  61     FE_INVALID_IDI = 1 << 31-9,
  62 #define FE_INVALID_IDI  FE_INVALID_IDI
  63
  64     /* 0 / 0 */
  65     FE_INVALID_ZDZ = 1 << 31-10,
  66 #define FE_INVALID_ZDZ  FE_INVALID_ZDZ
  67
  68     /* Inf * 0 */
  69     FE_INVALID_IMZ = 1 << 31-11,
  70 #define FE_INVALID_IMZ  FE_INVALID_IMZ
  71
  72     /* Comparison with NaN or SNaN. */
  73     FE_INVALID_COMPARE = 1 << 31-12,
  74 #define FE_INVALID_COMPARE      FE_INVALID_COMPARE
  75
  76     /* Invalid operation flag for software (not set by hardware). */
  77     FE_INVALID_SOFTWARE = 1 << 31-21,
  78 #define FE_INVALID_SOFTWARE     FE_INVALID_SOFTWARE
  79
  80     /* Square root of negative number (including -Inf). */
  81     FE_INVALID_SQRT = 1 << 31-22,
  82 #define FE_INVALID_SQRT FE_INVALID_SQRT
  83
  84     /* Conversion-to-integer of a NaN or a number too large or too small. */
  85     FE_INVALID_INTEGER_CONVERSION = 1 << 31-23,
  86 #define FE_INVALID_INTEGER_CONVERSION   FE_INVALID_INTEGER_CONVERSION
  87
  88 #define FE_ALL_INVALID \
  89         (FE_INVALID_SNAN | FE_INVALID_ISI | FE_INVALID_IDI | FE_INVALID_ZDZ \
  90          | FE_INVALID_IMZ | FE_INVALID_COMPARE | FE_INVALID_SOFTWARE \
  91          | FE_INVALID_SQRT | FE_INVALID_INTEGER_CONVERSION)
  92 #endif
  93   };
  94
  95 #define FE_ALL_EXCEPT \
  96         (FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
  97
  98 /* PowerPC chips support all of the four defined rounding modes.  We
  99    use the bit pattern in the FPSCR as the values for the
 100    appropriate macros.  */
 101 enum
 102   {
 103     FE_TONEAREST = 0,
 104 #define FE_TONEAREST    FE_TONEAREST
 105     FE_TOWARDSZERO = 1,
 106 #define FE_TOWARDSZERO  FE_TOWARDSZERO
 107     FE_UPWARD = 2,
 108 #define FE_UPWARD       FE_UPWARD
 109     FE_DOWNWARD = 3,
 110 #define FE_DOWNWARD     FE_DOWNWARD
 111   };
 112
 113 /* Type representing exception flags.  */
 114 typedef unsigned int fexcept_t;
 115
 116 /* Type representing floating-point environment.  We leave it as 'double'
 117    for efficiency reasons (rather than writing it to a 32-bit integer). */
 118 typedef double fenv_t;
 119
 120 /* If the default argument is used we use this value.  */
 121 extern const fenv_t __fe_dfl_env;
 122 #define FE_DFL_ENV      (&__fe_dfl_env);
 123
 124 #ifdef __USE_GNU
 125 /* Floating-point environment where none of the exceptions are masked.  */
 126 extern const fenv_t __fe_nomask_env;
 127 # define FE_NOMASK_ENV  (&__fe_nomask_env);
 128 #endif