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1 /*
2 * The authors hereby grant permission to use, copy, modify, distribute,
3 * and license this software and its documentation for any purpose, provided
4 * that existing copyright notices are retained in all copies and that this
5 * notice is included verbatim in any distributions. No written agreement,
6 * license, or royalty fee is required for any of the authorized uses.
7 * Modifications to this software may be copyrighted by their authors
8 * and need not follow the licensing terms described here, provided that
9 * the new terms are clearly indicated on the first page of each file where
10 * they apply.
11 */
12
13 /************************************************************************
14 *
15 * cplb.h
16 *
17 * Copyright (C) 2008, 2009 Analog Devices, Inc.
18 *
19 ************************************************************************/
20
21 /* Defines necessary for cplb initialisation routines. */
22
23 #ifndef _CPLB_H
24 #define _CPLB_H
25
26 #include <sys/platform.h>
27
28 #ifdef _MISRA_RULES
29 #pragma diag(push)
30 #pragma diag(suppress:misra_rule_19_4)
31 #endif /* _MISRA_RULES */
32
33 #define CPLB_ENABLE_ICACHE_P 0
34 #define CPLB_ENABLE_DCACHE_P 1
35 #define CPLB_ENABLE_DCACHE2_P 2
36 #define CPLB_ENABLE_CPLBS_P 3 /* Deprecated! */
37 #define CPLB_ENABLE_ICPLBS_P 4
38 #define CPLB_ENABLE_DCPLBS_P 5
39 #define CPLB_SET_DCBS_P 6
40 #define CPLB_INVALIDATE_B_P 23
41
42 /* ___cplb_ctrl bitmasks */
43 #define CPLB_ENABLE_ICACHE (1<<CPLB_ENABLE_ICACHE_P)
44 #define CPLB_ENABLE_DCACHE (1<<CPLB_ENABLE_DCACHE_P)
45 #define CPLB_ENABLE_DCACHE2 (1<<CPLB_ENABLE_DCACHE2_P)
46 #define CPLB_ENABLE_CPLBS (1<<CPLB_ENABLE_CPLBS_P)
47 #define CPLB_ENABLE_ICPLBS (1<<CPLB_ENABLE_ICPLBS_P)
48 #define CPLB_ENABLE_DCPLBS (1<<CPLB_ENABLE_DCPLBS_P)
49 #define CPLB_ENABLE_ANY_CPLBS \
50 ( CPLB_ENABLE_CPLBS | CPLB_ENABLE_ICPLBS | CPLB_ENABLE_DCPLBS )
51 #define CPLB_SET_DCBS (1<<CPLB_SET_DCBS_P)
52
53 /* Bitmasks for dcache_invalidate routine parameters */
54 #define CPLB_INVALIDATE_A 0
55 #define CPLB_INVALIDATE_B (1<<CPLB_INVALIDATE_B_P)
56
57 /* _cplb_mgr return values */
58 #define CPLB_RELOADED 0x0000
59 #define CPLB_NO_UNLOCKED 0x0001
60 #define CPLB_NO_ADDR_MATCH 0x0002
61 #define CPLB_PROT_VIOL 0x0003
62 #define CPLB_NO_ACTION 0x0004
63
64 /* CPLB configurations */
65 #define CPLB_DEF_CACHE_WT ( CPLB_L1_CHBL | CPLB_WT )
66 #define CPLB_DEF_CACHE_WB ( CPLB_L1_CHBL )
67 #define CPLB_CACHE_ENABLED ( CPLB_L1_CHBL | CPLB_DIRTY )
68
69 #define CPLB_DEF_CACHE ( CPLB_L1_CHBL | CPLB_WT )
70 #define CPLB_ALL_ACCESS ( CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR )
71
72 #define CPLB_I_PAGE_MGMT ( CPLB_LOCK | CPLB_VALID )
73 #define CPLB_D_PAGE_MGMT ( CPLB_LOCK | CPLB_ALL_ACCESS | CPLB_VALID )
74 #define CPLB_DNOCACHE ( CPLB_ALL_ACCESS | CPLB_VALID )
75 #define CPLB_DDOCACHE ( CPLB_DNOCACHE | CPLB_DEF_CACHE )
76 #define CPLB_INOCACHE ( CPLB_USER_RD | CPLB_VALID )
77 #define CPLB_IDOCACHE ( CPLB_INOCACHE | CPLB_L1_CHBL )
78
79 #define CPLB_DDOCACHE_WT ( CPLB_DNOCACHE | CPLB_DEF_CACHE_WT )
80 #define CPLB_DDOCACHE_WB ( CPLB_DNOCACHE | CPLB_DEF_CACHE_WB )
81
82 /* Event type parameter for replacement manager _cplb_mgr */
83 #define CPLB_EVT_ICPLB_MISS 0
84 #define CPLB_EVT_DCPLB_MISS 1
85 #define CPLB_EVT_DCPLB_WRITE 2
86
87 /* size of cplb tables */
88 #define __CPLB_TABLE_SIZE 16
89
90 #ifdef _MISRA_RULES
91 #pragma diag(pop)
92 #endif /* _MISRA_RULES */
93
94 #endif /* _CPLB_H */
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