Created attachment 13063 [details]
The minimal example

During research of ARM Cortex-M3-based processor for our master thesis, we found a bug (using a tool that generates random-but-correct sequences of assembly instructions).

Minimal example:

    .syntax unified
    .thumb

    .align 2
    .type f0, %function
    .thumb_func
    f0:                    @ This assembles successfuly.
        movs.n r0, 42      @ Sets the condition flags, executed unconditionally.

    .align 2
    .type f1, %function
    .thumb_func
    f1:                    @ This assembles successfully.
        it eq
        moveq.n r0, 42     @ Does not set the condition flags, but executed conditionally.

    .align 2
    .type f2, %function
    .thumb_func
    f2:                    @ This fails to assemble.
        it al
        moval.n r0, 42     @ Does not set the condition flags, executed unconditionally.


According to the ARMv7-M Architecture Reference Manual, the code is correct.

    16-bit instructions in the IT block, other than CMP, CMN, and TST, do not set the condition flags. The AL condition can be specified to get this changed behavior without conditional execution.

(Description of the IT instruction: Section A7.7.38 IT, page A7-236)


However, the assembler gives following error message (arm-none-eabi-as -o test.o test.s -mcpu=cortex-m3)

    test.s: Assembler messages:
    test.s:16: Error: instruction not allowed in IT block -- `moval.n r0,42'

Omitting the `al` suffix in `moval.n` instruction (i.e., "it al; mov.n r0, 42") does not help. The message is analogous ("Error: instruction not allowed in IT block -- `mov.n r0,42'").

Expected behavior: Assembler should successfully assemble the code.