This does not assemble with the latest gas from git/master (commit d2dfe70): .text .globl main .p2align 6, 0x90 .type main,@function main: vpbroadcastb %al, %ymm0 vpbroadcastw %ax, %ymm1 vpbroadcastb %eax, %ymm2 vpbroadcastw %eax, %ymm3 retq The first two vpbroadcast instructions fail with "invalid operand" while the second two get through. I checked the opcodes table in the latest master binutils and it only supports GR32 and GR64 source registers for these instructions. I see nothing in the Intel documentation that restricts these instructions to only take 32- and 64-bit GPRs. As far as I can tell encodings for 8- and 16-bit GPR sizes are legal. It's certainly possible I missed some subtlety and if so it would be helpful to have a better understanding of why these operand sizes aren't supported.
vpbroadcastb doesn't take 8-bit registers, like %ah. vpbroadcastb uses the lower 8 bits of the 32-bit register and vpbroadcastw uses the lower 16 bits of the 32-bit register.