Bug 2032 - GDB don't recognize debug information of crt0.s
Summary: GDB don't recognize debug information of crt0.s
Status: NEW
Alias: None
Product: binutils
Classification: Unclassified
Component: gas (show other bugs)
Version: 2.16
: P2 normal
Target Milestone: ---
Assignee: unassigned
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2005-12-12 09:17 UTC by Efim
Modified: 2006-03-28 04:29 UTC (History)
1 user (show)

See Also:
Host:
Target: arm-elf
Build:
Last reconfirmed:


Attachments

Note You need to log in before you can comment on or make changes to this bug.
Description Efim 2005-12-12 09:17:14 UTC
Hi, all

I try to debug the crt0.s modul with GDB. The small application contains only
crt0.s and a small dummy main.c in order to have the main() function.

If I step throw crt0.o be GDB it dont show me the source lines of module and I
can only see the disassembled codes.
The crt0.s uses its own Sections because the application can be big and can not
be placed in the same memory area as start up code.

I use the GNUARM tools.

Hier is the crt0.s:

/**************************** crt0.s ************************************/
/* Copyright 2003/12/28 Aeolus Development				*/
/*									*/
/* Freely modifiable and redistributable.  Modify to suit your own needs*/
/* Please remove Aeolus Development copyright for any significant	*/
/* modifications or add explanatory notes to explain the mods and	*/
/* list authour(s).							*/
/*									*/
/* THIS SOFTWARE IS PROVIDED BY THE AEOULUS DEVELOPMENT "AS IS" AND ANY	*/
/* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE	*/
/* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR	*/
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AEOLUS DEVELOPMENT BE	*/
/* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR	*/
/* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF	*/
/* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 	*/
/* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,*/
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE */
/* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 	*/
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.			*/
/*									*/
/*  Startup for LPC210X.  Use with associated linker script and newlib.	*/
/* Developed from source and hints from multiple startup modules 	*/
/* developed by others for various ARM systems.				*/
/************************************************************************/
/*
*   TLIB revision history:
*   1 crt0.s 30-Dec-2003,10:32:32,`RADSETT' First archival version.
*   2 crt0.s 03-Mar-2004,15:56:50,`RADSETT' Add stack setup for each CPU mode to
*        allow support of interrupts.
*   TLIB revision history ends.
*	3 longstartup.s allow call of main independ on address (no 32MB
*	  restriction), read CPSR before use for stack init
*/

	.extern	main 		/*  Usual C startup.			*/

	.section .startup1,"ax" 
	.code 32 

	.align 	0

	/*  Defined in link script so startup knows where everything 	*/
	/* is.								*/
	.extern	__bss_beg__	
	.extern	__bss_end__
	.extern __stack_end__
	.extern __data_beg__
	.extern __data_end__
	.extern __data_beg_src__

	.global	start 
	.global	endless_loop

	.set INIT_FIQ_MODE,		0x11
	.set INIT_IRQ_MODE,		0x12
	.set INIT_SUPERVISOR_MODE,	0x13
	.set INIT_ABORT_MODE,		0x17
	.set INIT_UNDEFINED_MODE,	0x1B
	.set INIT_SYSTEM_MODE,		0x1F

/********************* start ********************************************/
/*  start (AKA _start, _mainCRTStartup) -- Gains control on reset and	*/
/* set up environment before running the operating C program. 		*/
start: 
_start:
_mainCRTStartup:

	/* es ist möglich, dass ein anderes Programm vorher */
	/* abgebrochen war und CPSR Register nicht die Reset */
	/* Werte drin hat. Direktes Ändern des Thumb Bits kann */
	/* zu unvorhersagbarem CPU Verhalten führen. */
	/* Deshalb erst den CPSR Register auslesen und den Wert bei Stack */
	/* Initialisierung der verschiedenener CPU Modies benutzen */
	mrs r0, cpsr
	and r0, r0, #0xFFFFFFE0
	/* CPU Mode löschen */
	orr r0, r0, #0x000000C0
	/* IRQ und FIQ sperren */
	
	/*  Start by setting up a stack					*/
	/* Set up the stack pointer to end of bss 			*/
	orr r1, r0, #INIT_FIQ_MODE
	msr cpsr_c, r1
	ldr	sp, =__stack_end_fiq__
	orr r1, r0, #INIT_IRQ_MODE
	msr cpsr_c, r1
	ldr	sp, =__stack_end_irq__
	orr r1, r0, #INIT_SUPERVISOR_MODE
	msr cpsr_c, r1
	ldr	sp, =__stack_end_supervisor__
	orr r1, r0, #INIT_ABORT_MODE
	msr cpsr_c, r1
	ldr	sp, =__stack_end_abort__
	orr r1, r0, #INIT_UNDEFINED_MODE
	msr cpsr_c, r1
	ldr	sp, =__stack_end_undefined__
	orr r1, r0, #INIT_SYSTEM_MODE
	msr cpsr_c, r1
	ldr	sp, =__stack_end__

	sub	sl, sp, #512	/* Assumes 512 bytes below sp 		*/

	mov 	a2, #0		/* Fill value 				*/
	mov	fp, a2		/* Null frame pointer 			*/ 
	mov	r7, a2		/* Null frame pointer for Thumb 	*/
	
	ldr 	r1, .LC1	/*  __bss_beg__ set in link script to 	*/
				/* point at beginning of uninitialized	*/
				/* ram.					*/ 
	ldr 	r3, .LC2	/*  __bss_beg__ set in link script to 	*/
				/* point at end of uninitialized ram.	*/ 
	subs 	r3, r3, r1	/*  Subtract two to find length of 	*/
				/* uninitialized ram.			*/ 
	beq	.end_clear_loop	/*  If no uninitialzed ram skip init.	*/

	mov 	r2, #0		/*  Value used to init ram.		*/

.clear_loop:
	strb	r2, [r1], #1	/*  Clear byte at r1, advance to next	*/
	subs	r3, r3, #1	/*  One less to do			*/
	bgt	.clear_loop	/*  If not done go the next.		*/

.end_clear_loop:
	
	ldr	r1, .LC3	/*  __data_beg__ set in link script to 	*/
				/* point at beginning of initialized ram*/
	ldr 	r2, .LC4	/*  __data_beg_src__ set in link script	*/
				/* to point to beginning of flash copy 	*/
				/* of the initial values of initialized	*/
				/* variables.				*/ 
	ldr 	r3, .LC5	/*  __data_end__ set in link script to 	*/
				/* point at end of initialized ram	*/
	subs	r3, r3, r1	/*  Calculate length of area in ram	*/
				/* holding initialzed variables.	*/
	beq	.end_set_loop	/*  If no initialized vars skip init.	*/

.set_loop: 
	ldrb	r4, [r2], #1	/* Read byte from flash (increment ptr),*/
	strb	r4, [r1], #1  	/* store it in ram (increment ptr) and, */
	subs	r3, r3, #1  	/* reduce bytes to copy by 1.		*/
	bgt 	.set_loop	/* Continue until all copied.		*/

.end_set_loop: 

	/*  Set up arguments to main and call.				*/

	mov		r0, #0		/*  no arguments  */ 
	mov		r1, #0		/* no argv either */

	ldr		lr, =endless_loop
	ldr 	r2, .LC6
	bx r2

	/*  Returning from main in this environment is really an error.	*/
	/* Go into a dead loop.						*/
endless_loop:
	b		endless_loop

	/* For Thumb, constants must be after the code since only 
	positive offsets are supported for PC relative addresses. */
	
	.align 0
.LC1: 
.word	__bss_beg__ 
.LC2:   
.word	__bss_end__
.LC3:
.word	__data_beg__
.LC4:
.word	__data_beg_src__
.LC5:
.word	__data_end__
.LC6:
.word	main

	/**** Exception/Interrupt table ****/

	/*  defaults are defined in the link script.  The reserved	*/
	/* exception should be overridden by the download program 	*/
	/* (see LPC210X documentation).					*/

.section .startup,"ax" 
	.code 32 
	.align 0

	b	start
	b	undefined_instruction_exception
	b	software_interrupt_exception
	b	prefetch_abort_exception
	b	data_abort_exception
	b	reserved_exception
/*	b	interrupt_exception*/
	ldr	pc,[pc,#-0xFF0]	    	/* Vector via VIC		*/
	b	fast_interrupt_exception


The readelf.exe give me follow informations about crt0.o:

C:\WINNT\system32>C:\Programme\ARM-Eclipse\GNUARM\bin\arm-elf-readelf.exe -wil C
:\embedded\arm\workspace\functest\Debug\src\crt0.o

Dump of debug contents of section .debug_line:

  Length:                      125
  DWARF Version:               2
  Prologue Length:             33
  Minimum Instruction Length:  2
  Initial value of 'is_stmt':  1
  Line Base:                   -5
  Line Range:                  14
  Opcode Base:                 10
  (Pointer size:               4)

 Opcodes:
  Opcode 1 has 0 args
  Opcode 2 has 1 args
  Opcode 3 has 1 args
  Opcode 4 has 1 args
  Opcode 5 has 1 args
  Opcode 6 has 0 args
  Opcode 7 has 0 args
  Opcode 8 has 0 args
  Opcode 9 has 1 args

 The Directory Table:
  ../src

 The File Name Table:
  Entry Dir     Time    Size    Name
  1     1       0       0       crt0.s

 Line Number Statements:
  Extended opcode 2: set Address to 0x0
  Advance Line by 185 to 186
  Copy
  Special opcode 34: advance Address by 4 to 0x4 and Line by 1 to 187
  Special opcode 34: advance Address by 4 to 0x8 and Line by 1 to 188
  Special opcode 34: advance Address by 4 to 0xc and Line by 1 to 189
  Special opcode 34: advance Address by 4 to 0x10 and Line by 1 to 190
  Special opcode 34: advance Address by 4 to 0x14 and Line by 1 to 191
  Special opcode 35: advance Address by 4 to 0x18 and Line by 2 to 193
  Special opcode 34: advance Address by 4 to 0x1c and Line by 1 to 194
  Advance PC by 4 to 20
  Extended opcode 1: End of Sequence

  Extended opcode 2: set Address to 0x0
  Advance Line by 73 to 74
  Copy
  Special opcode 34: advance Address by 4 to 0x4 and Line by 1 to 75
  Special opcode 35: advance Address by 4 to 0x8 and Line by 2 to 77
  Special opcode 38: advance Address by 4 to 0xc and Line by 5 to 82
  Special opcode 34: advance Address by 4 to 0x10 and Line by 1 to 83
  Special opcode 34: advance Address by 4 to 0x14 and Line by 1 to 84
  Special opcode 34: advance Address by 4 to 0x18 and Line by 1 to 85
  Special opcode 34: advance Address by 4 to 0x1c and Line by 1 to 86
  Special opcode 34: advance Address by 4 to 0x20 and Line by 1 to 87
  Special opcode 34: advance Address by 4 to 0x24 and Line by 1 to 88
  Special opcode 34: advance Address by 4 to 0x28 and Line by 1 to 89
  Special opcode 34: advance Address by 4 to 0x2c and Line by 1 to 90
  Special opcode 34: advance Address by 4 to 0x30 and Line by 1 to 91
  Special opcode 34: advance Address by 4 to 0x34 and Line by 1 to 92
  Special opcode 34: advance Address by 4 to 0x38 and Line by 1 to 93
  Special opcode 34: advance Address by 4 to 0x3c and Line by 1 to 94
  Special opcode 34: advance Address by 4 to 0x40 and Line by 1 to 95
  Special opcode 34: advance Address by 4 to 0x44 and Line by 1 to 96
  Special opcode 34: advance Address by 4 to 0x48 and Line by 1 to 97
  Special opcode 34: advance Address by 4 to 0x4c and Line by 1 to 98
  Special opcode 34: advance Address by 4 to 0x50 and Line by 1 to 99
  Special opcode 35: advance Address by 4 to 0x54 and Line by 2 to 101
  Special opcode 35: advance Address by 4 to 0x58 and Line by 2 to 103
  Special opcode 34: advance Address by 4 to 0x5c and Line by 1 to 104
  Special opcode 34: advance Address by 4 to 0x60 and Line by 1 to 105
  Special opcode 35: advance Address by 4 to 0x64 and Line by 2 to 107
  Special opcode 36: advance Address by 4 to 0x68 and Line by 3 to 110
  Special opcode 35: advance Address by 4 to 0x6c and Line by 2 to 112
  Special opcode 35: advance Address by 4 to 0x70 and Line by 2 to 114
  Special opcode 35: advance Address by 4 to 0x74 and Line by 2 to 116
  Special opcode 36: advance Address by 4 to 0x78 and Line by 3 to 119
  Special opcode 34: advance Address by 4 to 0x7c and Line by 1 to 120
  Special opcode 34: advance Address by 4 to 0x80 and Line by 1 to 121
  Special opcode 37: advance Address by 4 to 0x84 and Line by 4 to 125
  Special opcode 35: advance Address by 4 to 0x88 and Line by 2 to 127
  Special opcode 37: advance Address by 4 to 0x8c and Line by 4 to 131
  Special opcode 35: advance Address by 4 to 0x90 and Line by 2 to 133
  Special opcode 35: advance Address by 4 to 0x94 and Line by 2 to 135
  Special opcode 36: advance Address by 4 to 0x98 and Line by 3 to 138
  Special opcode 34: advance Address by 4 to 0x9c and Line by 1 to 139
  Special opcode 34: advance Address by 4 to 0xa0 and Line by 1 to 140
  Special opcode 34: advance Address by 4 to 0xa4 and Line by 1 to 141
  Special opcode 39: advance Address by 4 to 0xa8 and Line by 6 to 147
  Special opcode 34: advance Address by 4 to 0xac and Line by 1 to 148
  Special opcode 35: advance Address by 4 to 0xb0 and Line by 2 to 150
  Special opcode 34: advance Address by 4 to 0xb4 and Line by 1 to 151
  Special opcode 34: advance Address by 4 to 0xb8 and Line by 1 to 152
  Special opcode 38: advance Address by 4 to 0xbc and Line by 5 to 157
  Advance PC by 56 to f4
  Extended opcode 1: End of Sequence


The section .debug_info contains:

  Compilation Unit @ 0:
   Length:        92
   Version:       2
   Abbrev Offset: 0
   Pointer Size:  4
 <0><b>: Abbrev Number: 1 (DW_TAG_compile_unit)
     DW_AT_stmt_list   : 0
     DW_AT_name        : ../src/crt0.s
     DW_AT_comp_dir    : /cygdrive/c/embedded/arm/workspace/functest/Debug
     DW_AT_producer    : GNU AS 2.16.1
     DW_AT_language    : 32769  (MIPS assembler)

I have asked by GDB and the problem is possibly the information DW_AT_low_pc and
DW_AT_high_pc are not available.

Thanks
Comment 1 Ben Elliston 2006-03-28 04:29:55 UTC
How are you compiling your assembly and main.c files into the executable?
Comment 2 Efim 2006-04-12 15:42:01 UTC
Subject: Re:  GDB don't recognize debug information of crt0.s

bje at sources dot redhat dot com schrieb:
> ------- Additional Comments From bje at sources dot redhat dot com  2006-03-28 04:29 -------
> How are you compiling your assembly and main.c files into the executable?
>
>   
I am using arm-elf-gcc V 4.01 from GNUARM distribution.
flags for for C: -O0 -ffunction-sections -fdata-sections -c 
-fmessage-length=0 -mcpu=arm7tdmi

assembler flags: -O0 -g3 -Wall -c -fmessage-length=0 -mcpu=arm7tdmi

start up file srt0.s don't contain a .text section
it contains a .startup section with interrupt vector table and an other 
section with start up code.
Because as I understand a section can not be divided in two parts in 
order to use
different memory areas. I need a possibility to place interrupt vector 
table in the internal RAM
and main program in the external RAM because the program size.


Best Regards
efim