Bug 14911 - On ARM FIQ banked registers are case sensitive.
Summary: On ARM FIQ banked registers are case sensitive.
Status: NEW
Alias: None
Product: binutils
Classification: Unclassified
Component: gas (show other bugs)
Version: unspecified
: P2 minor
Target Milestone: ---
Assignee: Not yet assigned to anyone
Depends on:
Reported: 2012-12-03 17:57 UTC by Dawid Ciężarkiewicz
Modified: 2014-08-11 05:49 UTC (History)
1 user (show)

See Also:
Last reconfirmed:


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Description Dawid Ciężarkiewicz 2012-12-03 17:57:46 UTC
I'm developing software using ARM Virtualization Extension. I use some
macros to shorten up some code, but my issue generally just narrows to
assembler, it seems.

I'm using msr/mrs instructions and while:

mrs SP_SVC, r1

works, the:

mrs SP_FIQ, r1


/tmp/ccZWskys.s:490: Error: selected processor does not support
requested special purpose register -- `msr SP_FIQ,r1'

only after I change to:

mrs SP_fiq, r1

the problem is gone.

This is not a big deal, but I still need a workaround for this in my
code. That's why I would like to report it. I guess register names
should be case insensitive.

I tried a lot of toolchains (different versions from linaro and
codesourcery) and all seem to be affected.
Comment 1 DeepaB 2014-08-11 05:49:07 UTC
I'm not able to reproduce the issue. Can you please send the commandline used and assembler version info?