as
has following command-line options for the Renesas
(formerly Hitachi) / SuperH SH family.
--little
Generate little endian code.
--big
Generate big endian code.
--relax
Alter jump instructions for long displacements.
--small
Align sections to 4 byte boundaries, not 16.
--dsp
Enable sh-dsp insns, and disable sh3e / sh4 insns.
--renesas
Disable optimization with section symbol for compatibility with Renesas assembler.
--allow-reg-prefix
Allow ’$’ as a register name prefix.
--fdpic
Generate an FDPIC object file.
--isa=sh4 | sh4a
Specify the sh4 or sh4a instruction set.
--isa=dsp
Enable sh-dsp insns, and disable sh3e / sh4 insns.
--isa=fp
Enable sh2e, sh3e, sh4, and sh4a insn sets.
--isa=all
Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
-h-tick-hex
Support H’00 style hex constants in addition to 0x00 style.