This option specifies the target processor. The assembler will issue
an error message if an attempt is made to assemble an instruction which
will not execute on the target processor. The following processor names
In addition to the basic instruction set, the assembler can be told to
accept some extention mnemonics. For example,
-march=z180+sli+infc extends z180 with SLI instructions and
IN F,(C). The following extentions are currently supported:
full (all known instructions),
adl (ADL CPU mode by default, eZ80 only),
sli (instruction known as SLI, SLL or SL1),
xyhl (instructions with halves of index registers: IXL, IXH,
xdcb (instructions like RotOp (II+d),R and BitOp n,(II+d),R),
infc (instruction IN F,(C) or IN (C)),
outc0 (instruction OUT (C),0).
Note that rather than extending a basic instruction set, the extention
mnemonics starting with
- revoke the respective functionality:
-march=z80-full+xyhl first removes all default extentions and adds
support for index registers halves only.
If this option is not specified then
-march=z80+xyhl+infc is assumed.
Mark all labels with specified prefix as local. But such label can be
marked global explicitly in the code. This option do not change default
local label prefix
.L, it is just adds new one.
Accept colonless labels. All symbols at line begin are treated as labels.
Accept assembler code produced by SDCC.
Single precision floating point numbers format. Default: ieee754 (32 bit).
Double precision floating point numbers format. Default: ieee754 (64 bit).
Floating point numbers formats.
Single or double precision IEEE754 compatible format.
Half precision IEEE754 compatible format (16 bits).
Single precision IEEE754 compatible format (32 bits).
Double precision IEEE754 compatible format (64 bits).
32 bit floating point format from z80float library by Zeda.
48 bit floating point format from Math48 package by Anders Hejlsberg.