Up: M68HC11-opcodes Branch Improvement

Certain pseudo opcodes are permitted for branch instructions. They expand to the shortest branch instruction that reach the target. Generally these mnemonics are made by prepending `j' to the start of Motorola mnemonic. These pseudo opcodes are not affected by the `--short-branches' or `--force-long-branches' options.

The following table summarizes the pseudo-operations.

                             Displacement Width
          |                     Options                                 |
          |    --short-branches           --force-long-branches         |
       Op |BYTE             WORD     | BYTE          WORD               |
      bsr | bsr <pc-rel>    <error>  |               jsr <abs>          |
      bra | bra <pc-rel>    <error>  |               jmp <abs>          |
     jbsr | bsr <pc-rel>   jsr <abs> | bsr <pc-rel>  jsr <abs>          |
     jbra | bra <pc-rel>   jmp <abs> | bra <pc-rel>  jmp <abs>          |
      bXX | bXX <pc-rel>    <error>  |               bNX +3; jmp <abs>  |
     jbXX | bXX <pc-rel>   bNX +3;   | bXX <pc-rel>  bNX +3; jmp <abs>  |
          |                jmp <abs> |                                  |
     XX: condition
     NX: negative of condition XX
These are the simplest jump pseudo-operations; they always map to one particular machine instruction, depending on the displacement to the branch target.
Here, `jbXX' stands for an entire family of pseudo-operations, where XX is a conditional branch or condition-code test. The full list of pseudo-ops in this family is:
           jbcc   jbeq   jbge   jbgt   jbhi   jbvs   jbpl  jblo
           jbcs   jbne   jblt   jble   jbls   jbvc   jbmi

For the cases of non-PC relative displacements and long displacements, as issues a longer code fragment in terms of NX, the opposite condition to XX. For example, for the non-PC relative case:

              jbXX foo


               bNXs oof
               jmp foo