The PC16550D contains independent serial input and output ports that perform byte-at-a-time I/O. The 16550 is distinguished from its predecessor, the 16450, by two 16-byte FIFOs. The FIFOs allow the CPU to buffer data to reduce the frequency of interrupts. The 16550 also supports model-control functions DMA hand-shaking, and have a loop-back mode for testing.
The Uart model is somewhat abstracted from its hardware counterpart:
The Sin and Sout pins carry a character at a time, including the parity bit, if enabled. Normally, a character is 7-bits wide, so the model transmits and receives one byte at a time. However, the chip supports character widths of 5 to 8 bits, so up to 9 bits (8 data + parity) may be transmitted. Stop bits are not modeled. If the sio-framing? attribute is off, then only the raw data bits are passed on the pins. The in-fifo-length attribute may be used to simulate an arbitrarily large input FIFO. The out-fifo-length attribute is the converse, though is just a placebo since there is no output FIFO processing at all.
The preceding point suggests that the model uses an infinite baud rate, since all the bits in a character are transmitted in a single event. This means that:
| SID Conventions | ||
|---|---|---|
| functional | supported | - |
| save/restore | supported | - |
| reentrant | not supported | - |
| target view manager | supported | Pins and registers are both accessible from the Target View Manager |
Related components
Besides the CPU bus, the UART typically connects to both a serial source and a serial sink component. The sink/source may be combined, as with a modem component. More advanced designs will use the TxRDY/RxRDY pins to communicate with a DMA controller.
If the UART is run using interrupts (versus polling) it should also be connected to the scheduler so that transmit/receive timeouts are handled correctly.
Because the UART will be programmed to use a specific line discipline, you must take care to match this discipline in both the sink and source.
The following configuration file segment shows how to connect the UART to a keyboard and console for interrupt-driven operation:
# components involved - cpu and bus are assumed
new hw-uart-ns16550 uart
new hw-keyboard keyboard
new hw-console console
new sid-sched-sim target-sched
set target-sched num-clients 2
# connect uart to bus at memory-mapped address 0x800000
connect-bus bus [0x800000-0x800008,4,1] uart Bus
# pin connections
connect-pin uart INTR -> cpu intr
connect-pin uart Sout -> console SIN
connect-pin keyboard SOUT -> uart Sin
connect-pin target-sched 0-event -> uart rx-timeout-event
connect-pin target-sched 1-event -> uart tx-timeout-event
# use 7-bits even-parity as the line discipline
set console line-disc "bits=7 parity=even"
set keyboard line-disc "bits=7 parity=even"
| pins | |||
|---|---|---|---|
| name | direction | legalvalues | behaviors |
| Sin | in | data + parity | serial input |
| Sout | out | data + parity | serial output |
| INTR | out | 0,1 | active high interrupt pin |
| TxRdy | out | 0,1 | active low transmitter ready (dma control) |
| RxRdy | out | 0,1 | active low receiver ready (dma control) |
| RTS | out | 0,1 | active low request to send (modem control) |
| DTR | out | 0,1 | active low data transmit ready (modem control) |
| OUT1 | out | 0,1 | active low user output (modem control) |
| OUT2 | out | 0,1 | active low user output (modem control) |
| CTS | in | 0,1 | active low clear to send (modem control) |
| DSR | in | 0,1 | active low data set ready (modem control) |
| RI | in | 0,1 | active low ring indicator (modem control |
| DCD | in | 0,1 | active low data carrier detect (modem control) |
| Reset | in | any | master reset |
| buses | |||
|---|---|---|---|
| name | addresses | accesses | behaviors |
| Bus | 0x0-0x7 | read/write, bytes only | access to registers |
| attributes | |||||
|---|---|---|---|---|---|
| name | category | legal values | default value | behaviors | |
| timeout | write | positive integers | 10 | sets the time to wait | |
National Semiconductor PC16550 data sheet, dated June 1995. This page has links to the data sheet and application notes (in PDF)