commit 0d02ed484d77c99aed34013a2cf9f18ced550857
Author: Stefan Wallentowitz <stefan.wallentowitz@tum.de>
Date:   Fri Dec 12 21:50:44 2014 +0100

    OR1K: Optional delay slot support
    
    The machine or1knd are OpenRISC implementations without delay slot
    
    newlib/Changelog:
    	* configure.host: or1knd support, OpenRISC without delay slot
    	* libc/include/machine/setjmp.h: Add or1knd
    	* libc/machine/or1k/setjmp.S: Optional delay slot

diff --git a/newlib/configure.host b/newlib/configure.host
index c7a0401..d405d22 100644
--- a/newlib/configure.host
+++ b/newlib/configure.host
@@ -245,7 +245,7 @@ case "${host_cpu}" in
   nios2*)
 	machine_dir=nios2
 	;;
-  or1k*)
+  or1k*|or1knd*)
 	machine_dir=or1k
 	;;
   powerpc*)
diff --git a/newlib/libc/include/machine/setjmp.h b/newlib/libc/include/machine/setjmp.h
index 596e64b..a9e0d71 100644
--- a/newlib/libc/include/machine/setjmp.h
+++ b/newlib/libc/include/machine/setjmp.h
@@ -1,7 +1,7 @@
 
 _BEGIN_STD_C
 
-#ifdef __or1k__
+#if defined(__or1k__) || defined(__or1knd__)
 #define _JBLEN 31 /* 32 GPRs - r0 */
 #define _JBTYPE unsigned long
 #endif
diff --git a/newlib/libc/machine/or1k/setjmp.S b/newlib/libc/machine/or1k/setjmp.S
index 13ccf8a..5c02327 100644
--- a/newlib/libc/machine/or1k/setjmp.S
+++ b/newlib/libc/machine/or1k/setjmp.S
@@ -49,8 +49,18 @@ setjmp:
 	l.mfspr	r13, r0, 17
 	l.sw	124(r3), r13
 /* Set result register to 0 and jump */
+// Different cases for optional delay slot
+#if defined(__OR1K_NODELAY__)
+	l.addi	r11, r0, 0
+	l.jr	r9
+#elif defined(__OR1K_DELAY__)
 	l.jr	r9
 	l.addi	r11, r0, 0
+#else
+	l.addi	r11, r0, 0
+	l.jr	r9
+	l.nop
+#endif
 
 .align  4
 .global longjmp
@@ -83,7 +93,16 @@ longjmp:
 	l.lwz	r24, 92(r3)
 	l.lwz	r26, 100(r3)
 	l.lwz	r28, 108(r3)
-	l.lwz	r30, 116(r3)
 
+// Different cases for optional delay slot
+#if defined(__OR1K_NODELAY__)
+	l.lwz	r30, 116(r3)
+	l.jr	r9
+#elif defined(__OR1K_DELAY__)
+	l.jr	r9
+	l.lwz	r30, 116(r3)
+#else
+	l.lwz	r30, 116(r3)
 	l.jr	r9
 	l.nop
+#endif