This is the mail archive of the systemtap@sources.redhat.com mailing list for the systemtap project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Hitachi djprobe mechanism


Roland McGrath wrote:
> At this point, you know that no CPU's PC can get into the probe-insertion
> area without hitting the int3.  There is no danger of "half baked"
> instruction decoding because any CPU getting there hits the breakpoint and
> enters an explicit synchronization path through kprobes infrastructure code.  
> A CPU that hits this breakpoint can either wait for the probe inserter to
> finish, or it could just handle it in kprobes style and move on if the
> instruction following the one copied by kprobes is outside the mutation area.
> 
> You store the remaining bytes of the probe jmp instruction.  Then store the
> first byte, replacing the int3.  Then let any synchronized CPUs continue;
> they could either resume kprobe-style processing, or back up the PC and
> restart to allow the new probe-inserted jmp to happen.

Possibly works if you're operating on instructions of 5 bytes or more only.

Karim
-- 
Author, Speaker, Developer, Consultant
Pushing Embedded and Real-Time Linux Systems Beyond the Limits
http://www.opersys.com || karim@opersys.com || 1-866-677-4546


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]