mep: minor field/insn patch

[DJ Delorie <dj at redhat dot com>]

Minor changes to some fields and insns, committed.

[cgen]
	* cpu/mep-c5.cpu (f-12s20): Change to signed.
	(lhucpm1): Limit to C5 mach.
	(dsp0,dsp1): Rewrite as aliases so that intrinsics are generated.
	* cpu/mep-core.cpu (extend-cdisp10): New.
	(f-cdisp10): Change to signed, use extend-cdisp10 to sign extend.

[opcodes]
	* mep-desc.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mep-opc.c: Regenerate.
	* mep-opc.h: Regenerate.

[sid/component/cgen-cpu/mep]
	* mep-core1-decode.cxx: Regenerate.
	* mep-core1-decode.h: Regenerate.
	* mep-decode.cxx: Regenerate.
	* mep-decode.h: Regenerate.

Index: cgen/cpu/mep-c5.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/mep-c5.cpu,v
retrieving revision 1.1
diff -p -U3 -r1.1  cgen/cpu/mep-c5.cpu
--- cgen/cpu/mep-c5.cpu	8 Apr 2009 20:39:34 -0000	1.1
+++ cgen/cpu/mep-c5.cpu	18 Apr 2009 02:45:16 -0000
@@ -6,7 +6,7 @@
 (dnf f-c5n6     "extended field"     (all-mep-core-isas)   24  4)
 (dnf f-c5n7     "extended field"     (all-mep-core-isas)   28  4)
 (dnf f-rl5      "register l c5"      (all-mep-core-isas)   20  4)
-(dnf f-12s20    "extended field"     (all-mep-core-isas)   20  12)
+(df  f-12s20    "extended field"     (all-mep-core-isas)   20  12  INT #f #f)
 
 (dnop rl5       "register Rl c5"     (all-mep-core-isas) h-gpr   f-rl5)
 (dnop cdisp12   "copro addend (12 bits)" (all-mep-core-isas) h-sint  f-12s20)
@@ -190,7 +190,7 @@
      ((mep (unit u-use-gpr (in usereg rma))
 	   (unit u-exec))))
 
-(dnci lhucpm1 "lhucpm1" (OPTIONAL_CP_INSN)
+(dnci lhucpm1 "lhucpm1" (OPTIONAL_CP_INSN (MACH c5))
      "lhucpm1 $crn,($rma+),$cdisp10a2"
      (+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xd) (f-ext62 #x3) cdisp10a2)
      (sequence ()
@@ -246,18 +246,15 @@
 	   (unit u-use-gpr (in usereg rn))
 	   (unit u-exec))))
 
-(dncmi dsp0 "dsp0" ((MACH c5) NO-DIS VOLATILE)
+(dnci dsp0 "dsp0" ((MACH c5) VOLATILE NO-DIS ALIAS)
      "dsp0 $c5rnmuimm24"
-     (emit dsp
-	   (rn (sll c5rnmuimm24 20))
-	   (rm (and (sll c5rnmuimm24 16) #xf))
-	   (uimm16 (and c5rnmuimm24 #xffff)))
-     )
+     (+ MAJ_15 c5rnmuimm24 (f-sub4 0))
+     (c-call VOID "do_DSP" (zext SI c5rnmuimm24) pc)
+     ((mep (unit u-exec))))
 
-(dncmi dsp1 "dsp1" ((MACH c5) NO-DIS VOLATILE)
+(dnci dsp1 "dsp1" ((MACH c5) VOLATILE NO-DIS ALIAS)
      "dsp1 $rn,$c5rmuimm20"
-     (emit dsp
-	   rn
-	   (rm (sll c5rnmuimm24 16))
-	   (uimm16 (and c5rnmuimm24 #xffff)))
-     )
+     (+ MAJ_15 rn (f-sub4 0) c5rmuimm20)
+     (set rn (c-call SI "do_DSP" rn (zext SI c5rmuimm20) pc))
+     ((mep (unit u-use-gpr (in usereg rn))
+	   (unit u-exec))))
Index: cgen/cpu/mep-core.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/mep-core.cpu,v
retrieving revision 1.4
diff -p -U3 -r1.4  cgen/cpu/mep-core.cpu
--- cgen/cpu/mep-core.cpu	8 Apr 2009 20:39:34 -0000	1.4
+++ cgen/cpu/mep-core.cpu	18 Apr 2009 02:45:16 -0000
@@ -455,10 +455,18 @@
 	 (cond SI ((and SI val #x80) (xor SI val #x300)) (else val)))
 	)
   )
+(define-pmacro (extend-cdisp10 val)
+  (cond SI
+	((and SI (compute-cdisp10 val) #x200)
+	 (sub (and SI (compute-cdisp10 val) #x3ff) #x400))
+	(else
+	 (and SI (compute-cdisp10 val) #x3ff))
+	)
+  )
 
-(df f-cdisp10    "cop imm10"          (all-mep-core-isas)   22  10 UINT
-    ((value pc) (compute-cdisp10 value))
-    ((value pc) (compute-cdisp10 value))
+(df f-cdisp10    "cop imm10"          (all-mep-core-isas)   22  10 INT
+    ((value pc) (extend-cdisp10 value))
+    ((value pc) (extend-cdisp10 value))
     )
 
 ; Non-contiguous fields.