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[PATCH 3/5] Add support for ARC to newlib
- From: Anton Kolesov <Anton dot Kolesov at synopsys dot com>
- To: newlib at sourceware dot org
- Cc: Anton Kolesov <Anton dot Kolesov at synopsys dot com>
- Date: Mon, 2 Nov 2015 14:34:59 +0300
- Subject: [PATCH 3/5] Add support for ARC to newlib
- Authentication-results: sourceware.org; auth=none
- References: <1446233985-12024-1-git-send-email-Anton dot Kolesov at synopsys dot com>
newlib/ChangeLog:
2015-10-30 Anton Kolesov <Anton.Kolesov@synopsys.com>
* configure.host: Add ARC support.
* libc/include/machine/setjmp.h: Likewise.
* libc/machine/configure: Likewise.
* libc/machine/configure.in: Likewise.
* libc/machine/arc/Makefile.am: Likewise.
* libc/machine/arc/Makefile.in: Likewise.
* libc/machine/arc/aclocal.m4: Likewise.
* libc/machine/arc/asm.h: Likewise.
* libc/machine/arc/configure: Likewise.
* libc/machine/arc/configure.in: Likewise.
* libc/machine/arc/memcmp-bs-norm.S: Likewise.
* libc/machine/arc/memcmp-stub.c: Likewise.
* libc/machine/arc/memcmp.S: Likewise.
* libc/machine/arc/memcpy-archs.S: Likewise.
* libc/machine/arc/memcpy-bs.S: Likewise.
* libc/machine/arc/memcpy-stub.c: Likewise.
* libc/machine/arc/memcpy.S: Likewise.
* libc/machine/arc/memset-archs.S: Likewise.
* libc/machine/arc/memset-bs.S: Likewise.
* libc/machine/arc/memset-stub.c: Likewise.
* libc/machine/arc/memset.S: Likewise.
* libc/machine/arc/setjmp.S: Likewise.
---
newlib/configure.host | 10 +-
newlib/libc/include/machine/setjmp.h | 4 +
newlib/libc/machine/arc/Makefile.am | 30 +
newlib/libc/machine/arc/Makefile.in | 502 ++++
newlib/libc/machine/arc/aclocal.m4 | 992 +++++++
newlib/libc/machine/arc/asm.h | 64 +
newlib/libc/machine/arc/configure | 4692 ++++++++++++++++++++++++++++++
newlib/libc/machine/arc/configure.in | 13 +
newlib/libc/machine/arc/memcmp-bs-norm.S | 223 ++
newlib/libc/machine/arc/memcmp-stub.c | 36 +
newlib/libc/machine/arc/memcmp.S | 153 +
newlib/libc/machine/arc/memcpy-archs.S | 268 ++
newlib/libc/machine/arc/memcpy-bs.S | 103 +
newlib/libc/machine/arc/memcpy-stub.c | 36 +
newlib/libc/machine/arc/memcpy.S | 109 +
newlib/libc/machine/arc/memset-archs.S | 146 +
newlib/libc/machine/arc/memset-bs.S | 154 +
newlib/libc/machine/arc/memset-stub.c | 36 +
newlib/libc/machine/arc/memset.S | 109 +
newlib/libc/machine/arc/setjmp.S | 165 ++
newlib/libc/machine/configure | 3 +
newlib/libc/machine/configure.in | 1 +
22 files changed, 7843 insertions(+), 6 deletions(-)
create mode 100644 newlib/libc/machine/arc/Makefile.am
create mode 100644 newlib/libc/machine/arc/Makefile.in
create mode 100644 newlib/libc/machine/arc/aclocal.m4
create mode 100644 newlib/libc/machine/arc/asm.h
create mode 100755 newlib/libc/machine/arc/configure
create mode 100644 newlib/libc/machine/arc/configure.in
create mode 100644 newlib/libc/machine/arc/memcmp-bs-norm.S
create mode 100644 newlib/libc/machine/arc/memcmp-stub.c
create mode 100644 newlib/libc/machine/arc/memcmp.S
create mode 100644 newlib/libc/machine/arc/memcpy-archs.S
create mode 100644 newlib/libc/machine/arc/memcpy-bs.S
create mode 100644 newlib/libc/machine/arc/memcpy-stub.c
create mode 100644 newlib/libc/machine/arc/memcpy.S
create mode 100644 newlib/libc/machine/arc/memset-archs.S
create mode 100644 newlib/libc/machine/arc/memset-bs.S
create mode 100644 newlib/libc/machine/arc/memset-stub.c
create mode 100644 newlib/libc/machine/arc/memset.S
create mode 100644 newlib/libc/machine/arc/setjmp.S
diff --git a/newlib/configure.host b/newlib/configure.host
index 9851fbc..5fa37d4 100644
--- a/newlib/configure.host
+++ b/newlib/configure.host
@@ -100,8 +100,8 @@ case "${host_cpu}" in
machine_dir=aarch64
libm_machine_dir=aarch64
;;
- arc)
- machine_dir=
+ arc*)
+ machine_dir=arc
;;
arm*)
machine_dir=arm
@@ -611,8 +611,9 @@ case "${host}" in
default_newlib_io_long_long="yes"
syscall_dir=syscalls
;;
- arc-*-*)
+ arc*-*-*)
syscall_dir=syscalls
+ default_newlib_io_long_long="yes"
;;
arm*-*-pe)
syscall_dir=syscalls
@@ -631,9 +632,6 @@ case "${host}" in
newlib_cflags="${newlib_cflags} -DARM_RDI_MONITOR"
fi
;;
- arc*)
- newlib_cflags="${newlib_cflags} -DREENTRANT_SYSCALLS_PROVIDED"
- ;;
avr*)
newlib_cflags="${newlib_cflags} -DNO_EXEC -DSMALL_MEMORY -DMISSING_SYSCALL_NAMES"
;;
diff --git a/newlib/libc/include/machine/setjmp.h b/newlib/libc/include/machine/setjmp.h
index 056325b..c08e682 100644
--- a/newlib/libc/include/machine/setjmp.h
+++ b/newlib/libc/include/machine/setjmp.h
@@ -262,6 +262,10 @@ _BEGIN_STD_C
#define _JBLEN 16
#endif
+#ifdef __arc__
+#define _JBLEN 25 /* r13-r30,blink,lp_count,lp_start,lp_end,mlo,mhi,status32 */
+#endif
+
#ifdef __MMIX__
/* Using a layout compatible with GCC's built-in. */
#define _JBLEN 5
diff --git a/newlib/libc/machine/arc/Makefile.am b/newlib/libc/machine/arc/Makefile.am
new file mode 100644
index 0000000..1fc428b
--- /dev/null
+++ b/newlib/libc/machine/arc/Makefile.am
@@ -0,0 +1,30 @@
+## Process this file with automake to generate Makefile.in
+
+AUTOMAKE_OPTIONS = cygnus
+
+INCLUDES = $(NEWLIB_CFLAGS) $(CROSS_CFLAGS) $(TARGET_CFLAGS)
+
+noinst_LIBRARIES = lib.a
+
+lib_a_SOURCES = \
+ memcmp.S \
+ memcmp-bs-norm.S \
+ memcmp-stub.c \
+ memcpy.S \
+ memcpy-archs.S \
+ memcpy-bs.S \
+ memcpy-stub.c \
+ memset.S \
+ memset-archs.S \
+ memset-bs.S \
+ memset-stub.c \
+ setjmp.S
+
+lib_a_CCASFLAGS=$(AM_CCASFLAGS)
+lib_a_CFLAGS = $(AM_CFLAGS)
+
+ACLOCAL_AMFLAGS = -I ../../..
+CONFIG_STATUS_DEPENDENCIES = $(newlib_basedir)/configure.host
+
+pdf:
+install-pdf:
diff --git a/newlib/libc/machine/arc/Makefile.in b/newlib/libc/machine/arc/Makefile.in
new file mode 100644
index 0000000..a887463
--- /dev/null
+++ b/newlib/libc/machine/arc/Makefile.in
@@ -0,0 +1,502 @@
+# Makefile.in generated by automake 1.11.1 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation,
+# Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
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+
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+ memcpy-bs.S \
+ memcpy-stub.c \
+ memset.S \
+ memset-archs.S \
+ memset-bs.S \
+ memset-stub.c \
+ setjmp.S
+
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+
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+
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+ $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(lib_a_CCASFLAGS) $(CCASFLAGS) -c -o lib_a-memset-archs.obj `if test -f 'memset-archs.S'; then $(CYGPATH_W) 'memset-archs.S'; else $(CYGPATH_W) '$(srcdir)/memset-archs.S'; fi`
+
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+
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+
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+
+.c.o:
+ $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+lib_a-memcmp-stub.o: memcmp-stub.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(lib_a_CFLAGS) $(CFLAGS) -c -o lib_a-memcmp-stub.o `test -f 'memcmp-stub.c' || echo '$(srcdir)/'`memcmp-stub.c
+
+lib_a-memcmp-stub.obj: memcmp-stub.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(lib_a_CFLAGS) $(CFLAGS) -c -o lib_a-memcmp-stub.obj `if test -f 'memcmp-stub.c'; then $(CYGPATH_W) 'memcmp-stub.c'; else $(CYGPATH_W) '$(srcdir)/memcmp-stub.c'; fi`
+
+lib_a-memcpy-stub.o: memcpy-stub.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(lib_a_CFLAGS) $(CFLAGS) -c -o lib_a-memcpy-stub.o `test -f 'memcpy-stub.c' || echo '$(srcdir)/'`memcpy-stub.c
+
+lib_a-memcpy-stub.obj: memcpy-stub.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(lib_a_CFLAGS) $(CFLAGS) -c -o lib_a-memcpy-stub.obj `if test -f 'memcpy-stub.c'; then $(CYGPATH_W) 'memcpy-stub.c'; else $(CYGPATH_W) '$(srcdir)/memcpy-stub.c'; fi`
+
+lib_a-memset-stub.o: memset-stub.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(lib_a_CFLAGS) $(CFLAGS) -c -o lib_a-memset-stub.o `test -f 'memset-stub.c' || echo '$(srcdir)/'`memset-stub.c
+
+lib_a-memset-stub.obj: memset-stub.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(lib_a_CFLAGS) $(CFLAGS) -c -o lib_a-memset-stub.obj `if test -f 'memset-stub.c'; then $(CYGPATH_W) 'memset-stub.c'; else $(CYGPATH_W) '$(srcdir)/memset-stub.c'; fi`
+
+ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ mkid -fID $$unique
+tags: TAGS
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ set x; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ shift; \
+ if test -z "$(ETAGS_ARGS)$$*$$unique"; then :; else \
+ test -n "$$unique" || unique=$$empty_fix; \
+ if test $$# -gt 0; then \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ "$$@" $$unique; \
+ else \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ $$unique; \
+ fi; \
+ fi
+ctags: CTAGS
+CTAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ test -z "$(CTAGS_ARGS)$$unique" \
+ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+ $$unique
+
+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
+ && $(am__cd) $(top_srcdir) \
+ && gtags -i $(GTAGS_ARGS) "$$here"
+
+distclean-tags:
+ -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+check-am:
+check: check-am
+all-am: Makefile $(LIBRARIES)
+installdirs:
+install: install-am
+install-exec: install-exec-am
+install-data: install-data-am
+uninstall: uninstall-am
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-am
+install-strip:
+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+ -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-generic clean-noinstLIBRARIES mostlyclean-am
+
+distclean: distclean-am
+ -rm -f $(am__CONFIG_DISTCLEAN_FILES)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-tags
+
+dvi: dvi-am
+
+dvi-am:
+
+html: html-am
+
+html-am:
+
+info: info-am
+
+info-am:
+
+install-data-am:
+
+install-dvi: install-dvi-am
+
+install-dvi-am:
+
+install-exec-am:
+
+install-html: install-html-am
+
+install-html-am:
+
+install-info: install-info-am
+
+install-info-am:
+
+install-man:
+
+install-pdf-am:
+
+install-ps: install-ps-am
+
+install-ps-am:
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-am
+ -rm -f $(am__CONFIG_DISTCLEAN_FILES)
+ -rm -rf $(top_srcdir)/autom4te.cache
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-am
+
+mostlyclean-am: mostlyclean-compile mostlyclean-generic
+
+pdf-am:
+
+ps: ps-am
+
+ps-am:
+
+uninstall-am:
+
+.MAKE: install-am install-strip
+
+.PHONY: CTAGS GTAGS all all-am am--refresh check check-am clean \
+ clean-generic clean-noinstLIBRARIES ctags distclean \
+ distclean-compile distclean-generic distclean-tags dvi dvi-am \
+ html html-am info info-am install install-am install-data \
+ install-data-am install-dvi install-dvi-am install-exec \
+ install-exec-am install-html install-html-am install-info \
+ install-info-am install-man install-pdf install-pdf-am \
+ install-ps install-ps-am install-strip installcheck \
+ installcheck-am installdirs maintainer-clean \
+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic pdf pdf-am ps ps-am tags uninstall \
+ uninstall-am
+
+
+pdf:
+install-pdf:
+
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
diff --git a/newlib/libc/machine/arc/aclocal.m4 b/newlib/libc/machine/arc/aclocal.m4
new file mode 100644
index 0000000..8b47be7
diff --git a/newlib/libc/machine/arc/asm.h b/newlib/libc/machine/arc/asm.h
new file mode 100644
index 0000000..c32f92f
--- /dev/null
+++ b/newlib/libc/machine/arc/asm.h
@@ -0,0 +1,64 @@
+#ifndef ARC_NEWLIB_ASM_H
+#define ARC_NEWLIB_ASM_H
+
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+#define _ENTRY(name) \
+ .text ` .balign 4 ` .globl name ` name:
+#define FUNC(name) .type name,@function
+#define ENDFUNC0(name) .Lfe_##name: .size name,.Lfe_##name-name
+#define ENDFUNC(name) ENDFUNC0 (name)
+#define ENTRY(name) _ENTRY (name) ` FUNC (name)
+
+#define add_l add
+#define bcc_l bcc
+#define bclr_l bclr
+#define beq_l beq
+#define bic_l bic
+#define b_l b
+#define bne_l bne
+#define breq_l breq
+#define brne_l brne
+#define j_l j
+#define ldb_l ldb
+#define ld_l ld
+#define mov_l mov
+#define or_l or
+#define st_l st
+#define stb_l stb
+#define sub_l sub
+#define tst_l tst
+#define extb_l extb
+
+#define bcc_s bhs_s
+
+#endif /* ARC_NEWLIB_ASM_H */
diff --git a/newlib/libc/machine/arc/configure b/newlib/libc/machine/arc/configure
new file mode 100755
index 0000000..1b918c2
diff --git a/newlib/libc/machine/arc/configure.in b/newlib/libc/machine/arc/configure.in
new file mode 100644
index 0000000..0c7c179
--- /dev/null
+++ b/newlib/libc/machine/arc/configure.in
@@ -0,0 +1,13 @@
+dnl This is the newlib/libc/machine/arc configure.in file.
+dnl Process this file with autoconf to produce a configure script.
+
+AC_PREREQ(2.59)
+AC_INIT([newlib],[NEWLIB_VERSION])
+AC_CONFIG_SRCDIR([Makefile.am])
+
+dnl Can't be done in NEWLIB_CONFIGURE because that confuses automake.
+AC_CONFIG_AUX_DIR(../../../..)
+
+NEWLIB_CONFIGURE(../../..)
+
+AC_OUTPUT(Makefile)
diff --git a/newlib/libc/machine/arc/memcmp-bs-norm.S b/newlib/libc/machine/arc/memcmp-bs-norm.S
new file mode 100644
index 0000000..990ceef
--- /dev/null
+++ b/newlib/libc/machine/arc/memcmp-bs-norm.S
@@ -0,0 +1,223 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/* This implementation is optimized for performance. For code size a generic
+ implementation of this function from newlib/libc/string/memcmp.c will be
+ used. */
+#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
+
+#include "asm.h"
+
+#if !defined (__ARC601__) && defined (__ARC_NORM__) && defined (__Xbarrel_shifter)
+#ifdef __LITTLE_ENDIAN__
+#define WORD2 r2
+#define SHIFT r3
+#else /* BIG ENDIAN */
+#define WORD2 r3
+#define SHIFT r2
+#endif
+
+ENTRY (memcmp)
+ or r12,r0,r1
+ asl_s r12,r12,30
+#if defined (__ARC700__) || defined (__EM__) || defined (__HS__)
+ sub_l r3,r2,1
+ brls r2,r12,.Lbytewise
+#else
+ brls.d r2,r12,.Lbytewise
+ sub_s r3,r2,1
+#endif
+ ld r4,[r0,0]
+ ld r5,[r1,0]
+ lsr.f lp_count,r3,3
+#ifdef __EM__
+ /* A branch can't be the last instruction in a zero overhead loop.
+ So we move the branch to the start of the loop, duplicate it
+ after the end, and set up r12 so that the branch isn't taken
+ initially. */
+ mov_s r12,WORD2
+ lpne .Loop_end
+ brne WORD2,r12,.Lodd
+ ld WORD2,[r0,4]
+#else
+ lpne .Loop_end
+ ld_s WORD2,[r0,4]
+#endif
+ ld_s r12,[r1,4]
+ brne r4,r5,.Leven
+ ld.a r4,[r0,8]
+ ld.a r5,[r1,8]
+#ifdef __EM__
+.Loop_end:
+ brne WORD2,r12,.Lodd
+#else
+ brne WORD2,r12,.Lodd
+#ifdef __HS__
+ nop
+#endif
+.Loop_end:
+#endif
+ asl_s SHIFT,SHIFT,3
+ bcc_s .Last_cmp
+ brne r4,r5,.Leven
+ ld r4,[r0,4]
+ ld r5,[r1,4]
+#ifdef __LITTLE_ENDIAN__
+#if defined (__ARC700__) || defined (__EM__) || defined (__HS__)
+ nop_s
+ ; one more load latency cycle
+.Last_cmp:
+ xor r0,r4,r5
+ bset r0,r0,SHIFT
+ sub_s r1,r0,1
+ bic_s r1,r1,r0
+ norm r1,r1
+ b.d .Leven_cmp
+ and r1,r1,24
+.Leven:
+ xor r0,r4,r5
+ sub_s r1,r0,1
+ bic_s r1,r1,r0
+ norm r1,r1
+ ; slow track insn
+ and r1,r1,24
+.Leven_cmp:
+ asl r2,r4,r1
+ asl r12,r5,r1
+ lsr_s r2,r2,1
+ lsr_s r12,r12,1
+ j_s.d [blink]
+ sub r0,r2,r12
+ .balign 4
+.Lodd:
+ xor r0,WORD2,r12
+ sub_s r1,r0,1
+ bic_s r1,r1,r0
+ norm r1,r1
+ ; slow track insn
+ and r1,r1,24
+ asl_s r2,r2,r1
+ asl_s r12,r12,r1
+ lsr_s r2,r2,1
+ lsr_s r12,r12,1
+ j_s.d [blink]
+ sub r0,r2,r12
+#else /* !__ARC700__ */
+ .balign 4
+.Last_cmp:
+ xor r0,r4,r5
+ b.d .Leven_cmp
+ bset r0,r0,SHIFT
+.Lodd:
+ mov_s r4,WORD2
+ mov_s r5,r12
+.Leven:
+ xor r0,r4,r5
+.Leven_cmp:
+ mov_s r1,0x80808080
+ ; uses long immediate
+ sub_s r12,r0,1
+ bic_s r0,r0,r12
+ sub r0,r1,r0
+ xor_s r0,r0,r1
+ and r1,r5,r0
+ and r0,r4,r0
+ xor.f 0,r0,r1
+ sub_s r0,r0,r1
+ j_s.d [blink]
+ mov.mi r0,r1
+#endif /* !__ARC700__ */
+#else /* BIG ENDIAN */
+.Last_cmp:
+ neg_s SHIFT,SHIFT
+ lsr r4,r4,SHIFT
+ lsr r5,r5,SHIFT
+ ; slow track insn
+.Leven:
+ sub.f r0,r4,r5
+ mov.ne r0,1
+ j_s.d [blink]
+ bset.cs r0,r0,31
+.Lodd:
+ cmp_s WORD2,r12
+#if defined (__ARC700__) || defined (__EM__) || defined (__HS__)
+ mov_s r0,1
+ j_s.d [blink]
+ bset.cs r0,r0,31
+#else /* !__ARC700__ */
+ j_s.d [blink]
+ rrc r0,2
+#endif /* !__ARC700__ */
+#endif /* ENDIAN */
+ .balign 4
+.Lbytewise:
+ breq r2,0,.Lnil
+ ldb r4,[r0,0]
+ ldb r5,[r1,0]
+ lsr.f lp_count,r3
+#ifdef __EM__
+ mov r12,r3
+ lpne .Lbyte_end
+ brne r3,r12,.Lbyte_odd
+#else
+ lpne .Lbyte_end
+#endif
+ ldb_s r3,[r0,1]
+ ldb_l r12,[r1,1]
+ brne r4,r5,.Lbyte_even
+ ldb.a r4,[r0,2]
+ ldb.a r5,[r1,2]
+#ifdef __EM__
+.Lbyte_end:
+ brne r3,r12,.Lbyte_odd
+#else
+ brne r3,r12,.Lbyte_odd
+#ifdef __HS__
+ nop
+#endif
+.Lbyte_end:
+#endif
+ bcc_l .Lbyte_even
+ brne r4,r5,.Lbyte_even
+ ldb_s r3,[r0,1]
+ ldb_s r12,[r1,1]
+.Lbyte_odd:
+ j_s.d [blink]
+ sub r0,r3,r12
+.Lbyte_even:
+ j_s.d [blink]
+ sub r0,r4,r5
+.Lnil:
+ j_s.d [blink]
+ mov_l r0,0
+ENDFUNC (memcmp)
+#endif /* !__ARC601__ && __ARC_NORM__ && __Xbarrel_shifter */
+
+#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
diff --git a/newlib/libc/machine/arc/memcmp-stub.c b/newlib/libc/machine/arc/memcmp-stub.c
new file mode 100644
index 0000000..30c7884
--- /dev/null
+++ b/newlib/libc/machine/arc/memcmp-stub.c
@@ -0,0 +1,36 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+#if defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)
+# include "../../string/memcmp.c"
+#else
+/* See memcmp-*.S. */
+#endif
diff --git a/newlib/libc/machine/arc/memcmp.S b/newlib/libc/machine/arc/memcmp.S
new file mode 100644
index 0000000..7014152
--- /dev/null
+++ b/newlib/libc/machine/arc/memcmp.S
@@ -0,0 +1,153 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/* This implementation is optimized for performance. For code size a generic
+ implementation of this function from newlib/libc/string/memcmp.c will be
+ used. */
+#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
+
+#include "asm.h"
+
+#if defined (__ARC601__) || !defined (__ARC_NORM__) || !defined (__Xbarrel_shifter)
+
+/* Addresses are unsigned, and at 0 is the vector table, so it's OK to assume
+ that we can subtract 8 from a source end address without underflow. */
+
+ENTRY (memcmp)
+ or r12,r0,r1
+ tst r12,3
+ breq r2,0,.Lnil
+ add_s r3,r0,r2
+
+/* This algorithm for big endian targets sometimes works incorrectly
+ when sources are aligned. To be precise the last step is omitted.
+ Just use a simple bytewise variant until the algorithm is reviewed
+ and fixed. */
+
+#ifdef __LITTLE_ENDIAN__
+ bne_s .Lbytewise
+#else /* BIG ENDIAN */
+ b_s .Lbytewise
+#endif /* ENDIAN */
+ sub r6,r3,8
+ ld r4,[r0,0]
+ ld r5,[r1,0]
+2:
+ brhs r0,r6,.Loop_end
+ ld_s r3,[r0,4]
+ ld_s r12,[r1,4]
+ brne r4,r5,.Leven
+ ld.a r4,[r0,8]
+ breq.d r3,r12,2b
+ ld.a r5,[r1,8]
+#ifdef __LITTLE_ENDIAN__
+ mov_s r4,r3
+ b.d .Lodd
+ mov_s r5,r12
+#else /* BIG ENDIAN */
+ cmp_s r3,r12
+ j_s.d [blink]
+ rrc r0,2
+#endif /* ENDIAN */
+
+ .balign 4
+.Loop_end:
+ sub r3,r0,r6
+ brhs r3,4,.Last_cmp
+ brne r4,r5,.Leven
+ ld r4,[r0,4]
+ ld r5,[r1,4]
+#ifdef __LITTLE_ENDIAN__
+ .balign 4
+.Last_cmp:
+ mov_l r0,24
+ add3 r2,r0,r2
+ xor r0,r4,r5
+ b.d .Leven_cmp
+ bset r0,r0,r2
+.Lodd:
+.Leven:
+ xor r0,r4,r5
+.Leven_cmp:
+ mov_s r1,0x80808080
+ ; uses long immediate
+ sub_s r12,r0,1
+ bic_s r0,r0,r12
+ sub r0,r1,r0
+ xor_s r0,r0,r1
+ and r1,r5,r0
+ and r0,r4,r0
+#else /* BIG ENDIAN */
+.Last_cmp:
+ mov_s r3,0
+ sub3 r2,r3,r2
+ sub_s r3,r3,1
+ bclr r3,r3,r2
+ add_l r3,r3,1
+ and r0,r4,r3
+ and r1,r5,r3
+.Leven:
+#endif /* ENDIAN */
+ xor.f 0,r0,r1
+ sub_s r0,r0,r1
+ j_s.d [blink]
+ mov.mi r0,r1
+ .balign 4
+.Lbytewise:
+ ldb r4,[r0,0]
+ ldb r5,[r1,0]
+ sub r6,r3,2
+3:
+ brhs r0,r6,.Lbyte_end
+ ldb_s r3,[r0,1]
+ ldb_s r12,[r1,1]
+ brne r4,r5,.Lbyte_even
+ ldb.a r4,[r0,2]
+ breq.d r3,r12,3b
+ ldb.a r5,[r1,2]
+.Lbyte_odd:
+ j_s.d [blink]
+ sub r0,r3,r12
+ .balign 4
+.Lbyte_end:
+ bbit1 r2,0,.Lbyte_even
+ brne r4,r5,.Lbyte_even
+ ldb r4,[r0,1]
+ ldb r5,[r1,1]
+.Lbyte_even:
+ j_s.d [blink]
+ sub r0,r4,r5
+.Lnil:
+ j_s.d [blink]
+ mov_s r0,0
+ENDFUNC (memcmp)
+#endif /* __ARC601__ || !__ARC_NORM__ || !__Xbarrel_shifter */
+
+#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
diff --git a/newlib/libc/machine/arc/memcpy-archs.S b/newlib/libc/machine/arc/memcpy-archs.S
new file mode 100644
index 0000000..9949f82
--- /dev/null
+++ b/newlib/libc/machine/arc/memcpy-archs.S
@@ -0,0 +1,268 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/* This implementation is optimized for performance. For code size a generic
+ implementation of this function from newlib/libc/string/memcpy.c will be
+ used. */
+#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
+
+#include "asm.h"
+
+#if defined (__HS__)
+
+#ifdef __LITTLE_ENDIAN__
+# define SHIFT_1(RX,RY,IMM) asl RX, RY, IMM ; <<
+# define SHIFT_2(RX,RY,IMM) lsr RX, RY, IMM ; >>
+# define MERGE_1(RX,RY,IMM) asl RX, RY, IMM
+# define MERGE_2(RX,RY,IMM)
+# define EXTRACT_1(RX,RY,IMM) and RX, RY, 0xFFFF
+# define EXTRACT_2(RX,RY,IMM) lsr RX, RY, IMM
+#else
+# define SHIFT_1(RX,RY,IMM) lsr RX, RY, IMM ; >>
+# define SHIFT_2(RX,RY,IMM) asl RX, RY, IMM ; <<
+# define MERGE_1(RX,RY,IMM) asl RX, RY, IMM ; <<
+# define MERGE_2(RX,RY,IMM) asl RX, RY, IMM ; <<
+# define EXTRACT_1(RX,RY,IMM) lsr RX, RY, IMM
+# define EXTRACT_2(RX,RY,IMM) lsr RX, RY, 0x08
+#endif
+
+#ifdef __LL64__
+# define PREFETCH_READ(RX) prefetch [RX, 56]
+# define PREFETCH_WRITE(RX) prefetchw [RX, 64]
+# define LOADX(DST,RX) ldd.ab DST, [RX, 8]
+# define STOREX(SRC,RX) std.ab SRC, [RX, 8]
+# define ZOLSHFT 5
+# define ZOLAND 0x1F
+#else
+# define PREFETCH_READ(RX) prefetch [RX, 28]
+# define PREFETCH_WRITE(RX) prefetchw [RX, 32]
+# define LOADX(DST,RX) ld.ab DST, [RX, 4]
+# define STOREX(SRC,RX) st.ab SRC, [RX, 4]
+# define ZOLSHFT 4
+# define ZOLAND 0xF
+#endif
+
+ENTRY (memcpy)
+ prefetch [r1] ; Prefetch the read location
+ prefetchw [r0] ; Prefetch the write location
+ mov.f 0, r2
+; if size is zero
+ jz.d [blink]
+ mov r3, r0 ; don't clobber ret val
+
+; if size <= 8
+ cmp r2, 8
+ bls.d @.Lsmallchunk
+ mov.f lp_count, r2
+
+ and.f r4, r0, 0x03
+ rsub lp_count, r4, 4
+ lpnz @.Laligndestination
+ ; LOOP BEGIN
+ ldb.ab r5, [r1,1]
+ sub r2, r2, 1
+ stb.ab r5, [r3,1]
+.Laligndestination:
+
+; Check the alignment of the source
+ and.f r4, r1, 0x03
+ bnz.d @.Lsourceunaligned
+
+; CASE 0: Both source and destination are 32bit aligned
+; Convert len to Dwords, unfold x4
+ lsr.f lp_count, r2, ZOLSHFT
+ lpnz @.Lcopy32_64bytes
+ ; LOOP START
+ LOADX (r6, r1)
+ PREFETCH_READ (r1)
+ PREFETCH_WRITE (r3)
+ LOADX (r8, r1)
+ LOADX (r10, r1)
+ LOADX (r4, r1)
+ STOREX (r6, r3)
+ STOREX (r8, r3)
+ STOREX (r10, r3)
+ STOREX (r4, r3)
+.Lcopy32_64bytes:
+
+ and.f lp_count, r2, ZOLAND ;Last remaining 31 bytes
+.Lsmallchunk:
+ lpnz @.Lcopyremainingbytes
+ ; LOOP START
+ ldb.ab r5, [r1,1]
+ stb.ab r5, [r3,1]
+.Lcopyremainingbytes:
+
+ j [blink]
+; END CASE 0
+
+.Lsourceunaligned:
+ cmp r4, 2
+ beq.d @.LunalignedOffby2
+ sub r2, r2, 1
+
+ bhi.d @.LunalignedOffby3
+ ldb.ab r5, [r1, 1]
+
+; CASE 1: The source is unaligned, off by 1
+ ; Hence I need to read 1 byte for a 16bit alignment
+ ; and 2bytes to reach 32bit alignment
+ ldh.ab r6, [r1, 2]
+ sub r2, r2, 2
+ ; Convert to words, unfold x2
+ lsr.f lp_count, r2, 3
+ MERGE_1 (r6, r6, 8)
+ MERGE_2 (r5, r5, 24)
+ or r5, r5, r6
+
+ ; Both src and dst are aligned
+ lpnz @.Lcopy8bytes_1
+ ; LOOP START
+ ld.ab r6, [r1, 4]
+ prefetch [r1, 28] ;Prefetch the next read location
+ ld.ab r8, [r1,4]
+ prefetchw [r3, 32] ;Prefetch the next write location
+
+ SHIFT_1 (r7, r6, 24)
+ or r7, r7, r5
+ SHIFT_2 (r5, r6, 8)
+
+ SHIFT_1 (r9, r8, 24)
+ or r9, r9, r5
+ SHIFT_2 (r5, r8, 8)
+
+ st.ab r7, [r3, 4]
+ st.ab r9, [r3, 4]
+.Lcopy8bytes_1:
+
+ ; Write back the remaining 16bits
+ EXTRACT_1 (r6, r5, 16)
+ sth.ab r6, [r3, 2]
+ ; Write back the remaining 8bits
+ EXTRACT_2 (r5, r5, 16)
+ stb.ab r5, [r3, 1]
+
+ and.f lp_count, r2, 0x07 ;Last 8bytes
+ lpnz @.Lcopybytewise_1
+ ; LOOP START
+ ldb.ab r6, [r1,1]
+ stb.ab r6, [r3,1]
+.Lcopybytewise_1:
+ j [blink]
+
+.LunalignedOffby2:
+; CASE 2: The source is unaligned, off by 2
+ ldh.ab r5, [r1, 2]
+ sub r2, r2, 1
+
+ ; Both src and dst are aligned
+ ; Convert to words, unfold x2
+ lsr.f lp_count, r2, 3
+#ifdef __BIG_ENDIAN__
+ asl.nz r5, r5, 16
+#endif
+ lpnz @.Lcopy8bytes_2
+ ; LOOP START
+ ld.ab r6, [r1, 4]
+ prefetch [r1, 28] ;Prefetch the next read location
+ ld.ab r8, [r1,4]
+ prefetchw [r3, 32] ;Prefetch the next write location
+
+ SHIFT_1 (r7, r6, 16)
+ or r7, r7, r5
+ SHIFT_2 (r5, r6, 16)
+
+ SHIFT_1 (r9, r8, 16)
+ or r9, r9, r5
+ SHIFT_2 (r5, r8, 16)
+
+ st.ab r7, [r3, 4]
+ st.ab r9, [r3, 4]
+.Lcopy8bytes_2:
+
+#ifdef __BIG_ENDIAN__
+ lsr.nz r5, r5, 16
+#endif
+ sth.ab r5, [r3, 2]
+
+ and.f lp_count, r2, 0x07 ;Last 8bytes
+ lpnz @.Lcopybytewise_2
+ ; LOOP START
+ ldb.ab r6, [r1,1]
+ stb.ab r6, [r3,1]
+.Lcopybytewise_2:
+ j [blink]
+
+.LunalignedOffby3:
+; CASE 3: The source is unaligned, off by 3
+; Hence, I need to read 1byte for achieve the 32bit alignment
+
+ ; Both src and dst are aligned
+ ; Convert to words, unfold x2
+ lsr.f lp_count, r2, 3
+#ifdef __BIG_ENDIAN__
+ asl.ne r5, r5, 24
+#endif
+ lpnz @.Lcopy8bytes_3
+ ; LOOP START
+ ld.ab r6, [r1, 4]
+ prefetch [r1, 28] ;Prefetch the next read location
+ ld.ab r8, [r1,4]
+ prefetchw [r3, 32] ;Prefetch the next write location
+
+ SHIFT_1 (r7, r6, 8)
+ or r7, r7, r5
+ SHIFT_2 (r5, r6, 24)
+
+ SHIFT_1 (r9, r8, 8)
+ or r9, r9, r5
+ SHIFT_2 (r5, r8, 24)
+
+ st.ab r7, [r3, 4]
+ st.ab r9, [r3, 4]
+.Lcopy8bytes_3:
+
+#ifdef __BIG_ENDIAN__
+ lsr.nz r5, r5, 24
+#endif
+ stb.ab r5, [r3, 1]
+
+ and.f lp_count, r2, 0x07 ;Last 8bytes
+ lpnz @.Lcopybytewise_3
+ ; LOOP START
+ ldb.ab r6, [r1,1]
+ stb.ab r6, [r3,1]
+.Lcopybytewise_3:
+ j [blink]
+
+ENDFUNC (memcpy)
+#endif /* __HS__ */
+
+#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
diff --git a/newlib/libc/machine/arc/memcpy-bs.S b/newlib/libc/machine/arc/memcpy-bs.S
new file mode 100644
index 0000000..8258094
--- /dev/null
+++ b/newlib/libc/machine/arc/memcpy-bs.S
@@ -0,0 +1,103 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/* This implementation is optimized for performance. For code size a generic
+ implementation of this function from newlib/libc/string/memcpy.c will be
+ used. */
+#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
+
+#include "asm.h"
+
+#if !defined (__ARC601__) && !defined (__HS__) && defined (__Xbarrel_shifter)
+/* Mostly optimized for ARC700, but not bad for ARC600 either. */
+/* This memcpy implementation does not support objects of 1GB or larger -
+ the check for alignment does not work then. */
+/* We assume that most sources and destinations are aligned, and
+ that also lengths are mostly a multiple of four, although to a lesser
+ extent. */
+ENTRY (memcpy)
+ or r3,r0,r1
+ asl_s r3,r3,30
+ mov_s r5,r0
+ brls.d r2,r3,.Lcopy_bytewise
+ sub.f r3,r2,1
+ ld_s r12,[r1,0]
+ asr.f lp_count,r3,3
+ bbit0.d r3,2,.Lnox4
+ bmsk_s r2,r2,1
+ st.ab r12,[r5,4]
+ ld.a r12,[r1,4]
+.Lnox4:
+ lppnz .Lendloop
+ ld_s r3,[r1,4]
+ st.ab r12,[r5,4]
+ ld.a r12,[r1,8]
+ st.ab r3,[r5,4]
+.Lendloop:
+ breq_l r2,0,.Last_store
+ ld r3,[r5,0]
+#ifdef __LITTLE_ENDIAN__
+ add3 r2,-1,r2
+ ; uses long immediate
+ xor_s r12,r12,r3
+ bmsk r12,r12,r2
+ xor_s r12,r12,r3
+#else /* BIG ENDIAN */
+ sub3 r2,31,r2
+ ; uses long immediate
+ xor_s r3,r3,r12
+ bmsk r3,r3,r2
+ xor_s r12,r12,r3
+#endif /* ENDIAN */
+.Last_store:
+ j_s.d [blink]
+ st r12,[r5,0]
+
+ .balign 4
+.Lcopy_bytewise:
+ jcs [blink]
+ ldb_s r12,[r1,0]
+ lsr.f lp_count,r3
+ bcc_s .Lnox1
+ stb.ab r12,[r5,1]
+ ldb.a r12,[r1,1]
+.Lnox1:
+ lppnz .Lendbloop
+ ldb_s r3,[r1,1]
+ stb.ab r12,[r5,1]
+ ldb.a r12,[r1,2]
+ stb.ab r3,[r5,1]
+.Lendbloop:
+ j_s.d [blink]
+ stb r12,[r5,0]
+ENDFUNC (memcpy)
+#endif /* !__ARC601__ && !__HS__ && __Xbarrel_shifter */
+
+#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
diff --git a/newlib/libc/machine/arc/memcpy-stub.c b/newlib/libc/machine/arc/memcpy-stub.c
new file mode 100644
index 0000000..cc46c2d
--- /dev/null
+++ b/newlib/libc/machine/arc/memcpy-stub.c
@@ -0,0 +1,36 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+#if defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)
+# include "../../string/memcpy.c"
+#else
+/* See memcpy-*.S. */
+#endif
diff --git a/newlib/libc/machine/arc/memcpy.S b/newlib/libc/machine/arc/memcpy.S
new file mode 100644
index 0000000..e49fa0c
--- /dev/null
+++ b/newlib/libc/machine/arc/memcpy.S
@@ -0,0 +1,109 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/* This implementation is optimized for performance. For code size a generic
+ implementation of this function from newlib/libc/string/memcpy.c will be
+ used. */
+#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
+
+#include "asm.h"
+
+#if defined (__ARC601__) || (!defined (__Xbarrel_shifter) && !defined (__HS__))
+/* Adapted from memcpy-bs.S. */
+/* We assume that most sources and destinations are aligned, and
+ that also lengths are mostly a multiple of four, although to a lesser
+ extent. */
+ENTRY (memcpy)
+ or r3,r0,r1
+ bmsk.f 0,r3,1
+ breq_s r2,0,.Lnil
+ mov_s r5,r0
+ bne.d .Lcopy_bytewise
+ add r6,r0,r2
+ sub_s r3,r2,1
+ ld_s r12,[r1,0]
+ bbit0.d r3,2,.Lnox4
+ sub r6,r6,8
+ st.ab r12,[r5,4]
+ ld.a r12,[r1,4]
+.Lnox4:
+ brlo r2,9,.Lendloop
+.Lnox4a:
+ ld_s r3,[r1,4]
+ st.ab r12,[r5,8]
+ ld.a r12,[r1,8]
+ brlo.d r5,r6,.Lnox4a
+ st r3,[r5,-4]
+.Lendloop:
+#ifdef __LITTLE_ENDIAN__
+ ld r3,[r5,0]
+ add3 r2,-1,r2
+ ; uses long immediate
+ xor_s r12,r12,r3
+ bmsk r12,r12,r2
+ xor_s r12,r12,r3
+#else /* BIG ENDIAN */
+ bmsk_s r2,r2,1
+ breq_s r2,0,.Last_store
+ ld r3,[r5,0]
+ sub3 r2,31,r2
+ ; uses long immediate
+ xor_s r3,r3,r12
+ bmsk r3,r3,r2
+ xor_s r12,r12,r3
+#endif /* ENDIAN */
+.Last_store:
+ j_s.d [blink]
+ st r12,[r5,0]
+
+.Lnil:
+ j_s [blink]
+ .balign 4
+.Lcopy_bytewise:
+ ldb_s r12,[r1,0]
+ bbit1.d r2,0,.Lnox1
+ sub r6,r6,2
+ stb.ab r12,[r5,1]
+ ldb.a r12,[r1,1]
+.Lnox1:
+ brlo r2,3,.Lendbloop
+.Lnox1a:
+ ldb_s r3,[r1,1]
+ stb.ab r12,[r5,2]
+ ldb.a r12,[r1,2]
+ brlo.d r5,r6,.Lnox1a
+ stb r3,[r5,-1]
+.Lendbloop:
+ j_s.d [blink]
+ stb r12,[r5,0]
+ENDFUNC (memcpy)
+#endif /* __ARC601__ || (!__Xbarrel_shifter && !__HS__) */
+
+#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
diff --git a/newlib/libc/machine/arc/memset-archs.S b/newlib/libc/machine/arc/memset-archs.S
new file mode 100644
index 0000000..2d1ee4b
--- /dev/null
+++ b/newlib/libc/machine/arc/memset-archs.S
@@ -0,0 +1,146 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/* This implementation is optimized for performance. For code size a generic
+ implementation of this function from newlib/libc/string/memset.c will be
+ used. */
+#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
+
+#include "asm.h"
+
+#ifdef __HS__
+
+#ifdef USE_PREFETCH
+#define PREWRITE(A,B) prefetchw [(A),(B)]
+#else
+#define PREWRITE(A,B) prealloc [(A),(B)]
+#endif
+
+ENTRY (memset)
+ prefetchw [r0] ; Prefetch the write location
+ mov.f 0, r2
+; if size is zero
+ jz.d [blink]
+ mov r3, r0 ; don't clobber ret val
+
+; if length < 8
+ brls.d.nt r2, 8, .Lsmallchunk
+ mov.f lp_count,r2
+
+ and.f r4, r0, 0x03
+ rsub lp_count, r4, 4
+ lpnz @.Laligndestination
+ ; LOOP BEGIN
+ stb.ab r1, [r3,1]
+ sub r2, r2, 1
+.Laligndestination:
+
+; Destination is aligned
+ and r1, r1, 0xFF
+ asl r4, r1, 8
+ or r4, r4, r1
+ asl r5, r4, 16
+ or r5, r5, r4
+ mov r4, r5
+
+ sub3 lp_count, r2, 8
+ cmp r2, 64
+ bmsk.hi r2, r2, 5
+ mov.ls lp_count, 0
+ add3.hi r2, r2, 8
+
+; Convert len to Dwords, unfold x8
+ lsr.f lp_count, lp_count, 6
+ lpnz @.Lset64bytes
+ ; LOOP START
+ PREWRITE (r3, 64) ;Prefetch the next write location
+#ifdef __LL64__
+ std.ab r4, [r3, 8]
+ std.ab r4, [r3, 8]
+ std.ab r4, [r3, 8]
+ std.ab r4, [r3, 8]
+ std.ab r4, [r3, 8]
+ std.ab r4, [r3, 8]
+ std.ab r4, [r3, 8]
+ std.ab r4, [r3, 8]
+#else
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+#endif
+.Lset64bytes:
+
+ lsr.f lp_count, r2, 5 ;Last remaining max 124 bytes
+ lpnz .Lset32bytes
+ ; LOOP START
+ prefetchw [r3, 32] ;Prefetch the next write location
+#ifdef __LL64__
+ std.ab r4, [r3, 8]
+ std.ab r4, [r3, 8]
+ std.ab r4, [r3, 8]
+ std.ab r4, [r3, 8]
+#else
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+ st.ab r4, [r3, 4]
+#endif
+.Lset32bytes:
+
+ and.f lp_count, r2, 0x1F ;Last remaining 31 bytes
+.Lsmallchunk:
+ lpnz .Lcopy3bytes
+ ; LOOP START
+ stb.ab r1, [r3, 1]
+.Lcopy3bytes:
+
+ j [blink]
+
+ENDFUNC (memset)
+#endif /* __HS__ */
+
+#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
diff --git a/newlib/libc/machine/arc/memset-bs.S b/newlib/libc/machine/arc/memset-bs.S
new file mode 100644
index 0000000..3c91ae3
--- /dev/null
+++ b/newlib/libc/machine/arc/memset-bs.S
@@ -0,0 +1,154 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/* This implementation is optimized for performance. For code size a generic
+ implementation of this function from newlib/libc/string/memset.c will be
+ used. */
+#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
+
+#include "asm.h"
+
+/* ARC HS has it's own implementation of memset, yet we want this function
+ still to be compiled under "__dummy_memset" disguise, because strncpy
+ function uses __strncpy_bzero as a second entry point into memset. Would be
+ better to add __strncpy_bzero label to memset for ARC HS though, and even
+ better would be to avoid a second entry point into function. ARC HS always
+ has barrel-shifter, so this implementation will be always used for this
+ purpose. */
+#if !defined (__ARC601__) && defined (__Xbarrel_shifter)
+
+/* To deal with alignment/loop issues, SMALL must be at least 2. */
+#define SMALL 7
+
+ .global __strncpy_bzero
+ .hidden __strncpy_bzero
+/* __strncpy_bzero provides the following interface to strncpy:
+ r0: return value
+ r2: zeroing length
+ r3: zeroing start address
+ No attempt is made here for __strncpy_memset to speed up aligned
+ cases, because the copying of a string presumably leaves start address
+ and length alignment for the zeroing randomly distributed. */
+
+#ifdef __HS__
+ENTRY (__dummy_memset)
+#else
+ENTRY (memset)
+#endif
+#if !defined (__ARC700__) && !defined (__EM__)
+#undef SMALL
+#define SMALL 8 /* Even faster if aligned. */
+ brls.d r2,SMALL,.Ltiny
+#endif
+ mov_s r3,r0
+ or r12,r0,r2
+ bmsk.f r12,r12,1
+ extb_s r1,r1
+ asl r12,r1,8
+ beq.d .Laligned
+ or_s r1,r1,r12
+#if defined (__ARC700__) || defined (__EM__)
+ brls r2,SMALL,.Ltiny
+#endif
+.Lnot_tiny:
+ add_s r12,r2,r0
+ stb r1,[r12,-1]
+ bclr_l r12,r12,0
+ stw r1,[r12,-2]
+ bmsk.f r12,r3,1
+ add_s r2,r2,r12
+ sub.ne r2,r2,4
+ stb.ab r1,[r3,1]
+ bclr_s r3,r3,0
+ stw.ab r1,[r3,2]
+ bclr_s r3,r3,1
+.Laligned: ; This code address should be aligned for speed.
+#if defined (__ARC700__) || defined (__EM__)
+ asl r12,r1,16
+ lsr.f lp_count,r2,2
+ or_s r1,r1,r12
+ lpne .Loop_end
+ st.ab r1,[r3,4]
+.Loop_end:
+ j_s [blink]
+#else /* !__ARC700 */
+ lsr.f lp_count,r2,3
+ asl r12,r1,16
+ or_s r1,r1,r12
+ lpne .Loop_end
+ st.ab r1,[r3,4]
+ st.ab r1,[r3,4]
+.Loop_end:
+ jcc [blink]
+ j_s.d [blink]
+ st_s r1,[r3]
+#endif /* !__ARC700 */
+
+#if defined (__ARC700__) || defined (__EM__)
+ .balign 4
+__strncpy_bzero:
+ brhi.d r2,17,.Lnot_tiny
+ mov_l r1,0
+.Ltiny:
+ mov.f lp_count,r2
+ lpne .Ltiny_end
+ stb.ab r1,[r3,1]
+.Ltiny_end:
+ j_s [blink]
+#else /* !__ARC700__ */
+#if SMALL > 8
+FIXME
+#endif
+ .balign 4
+__strncpy_bzero:
+ brhi.d r2,8,.Lnot_tiny
+ mov_s r1,0
+.Ltiny:
+ sub_s r2,r2,11
+ sub1 r12,pcl,r2
+ j_s [r12]
+ stb_s r1,[r3,7]
+ stb_s r1,[r3,6]
+ stb_s r1,[r3,5]
+ stb_s r1,[r3,4]
+ stb_s r1,[r3,3]
+ stb_s r1,[r3,2]
+ stb_s r1,[r3,1]
+ stb_s r1,[r3]
+ j_s [blink]
+#endif /* !__ARC700 */
+#ifdef __HS__
+ENDFUNC (__dummy_memset)
+#else
+ENDFUNC (memset)
+#endif
+#endif /* !__ARC601__ && __Xbarrel_shifter */
+
+#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
diff --git a/newlib/libc/machine/arc/memset-stub.c b/newlib/libc/machine/arc/memset-stub.c
new file mode 100644
index 0000000..981ca1f
--- /dev/null
+++ b/newlib/libc/machine/arc/memset-stub.c
@@ -0,0 +1,36 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+#if defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)
+# include "../../string/memset.c"
+#else
+/* See memset-*.S. */
+#endif
diff --git a/newlib/libc/machine/arc/memset.S b/newlib/libc/machine/arc/memset.S
new file mode 100644
index 0000000..df15b9d
--- /dev/null
+++ b/newlib/libc/machine/arc/memset.S
@@ -0,0 +1,109 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/* This implementation is optimized for performance. For code size a generic
+ implementation of this function from newlib/libc/string/memset.c will be
+ used. */
+#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
+
+#include "asm.h"
+
+#if defined (__ARC601__) || (!defined (__Xbarrel_shifter) && !defined (__HS__))
+
+/* To deal with alignment/loop issues, SMALL must be at least 2. */
+#define SMALL 8 /* Even faster if aligned. */
+
+ .global __strncpy_bzero
+ .hidden __strncpy_bzero
+/* __strncpy_bzero provides the following interface to strncpy:
+ r0: return value
+ r2: zeroing length
+ r3: zeroing start address
+ No attempt is made here for __strncpy_memset to speed up aligned
+ cases, because the copying of a string presumably leaves start address
+ and length alignment for the zeroing randomly distributed. */
+
+ENTRY (memset)
+ brls.d r2,SMALL,.Ltiny
+ mov_s r3,r0
+ or r12,r0,r2
+ bmsk.f r12,r12,1
+ breq_s r1,0,.Lbzero
+ mov r4,0
+ stb.a r1,[sp,-4]
+ stb r1,[sp,1]
+ stb r1,[sp,2]
+ stb r1,[sp,3]
+ ld.ab r1,[sp,4]
+.Lbzero:
+ beq.d .Laligned
+.Lbzero2:
+ add r6,r2,r3
+.Lnot_tiny:
+ stb r1,[r6,-1]
+ bclr r12,r6,0
+ stw r1,[r12,-2]
+ stb.ab r1,[r3,1]
+ bclr_s r3,r3,0
+ stw.ab r1,[r3,2]
+ bclr_s r3,r3,1
+.Laligned: ; This code address should be aligned for speed.
+ sub r6,r6,8
+ brlo.d r6,r3,.Loop_end
+ sub r6,r6,8
+3:
+ st_l r1,[r3,4]
+ brhs.d r6,r3,3b
+ st.ab r1,[r3,8]
+.Loop_end:
+ bic r12,r6,3
+ j_s.d [blink]
+ st_s r1,[r12,12]
+ .balign 4
+__strncpy_bzero:
+ brhi.d r2,8,.Lbzero2
+ mov_s r1,0
+.Ltiny:
+ sub_s r2,r2,11
+ sub1 r12,pcl,r2
+ j_s [r12]
+ stb_s r1,[r3,7]
+ stb_s r1,[r3,6]
+ stb_s r1,[r3,5]
+ stb_s r1,[r3,4]
+ stb_s r1,[r3,3]
+ stb_s r1,[r3,2]
+ stb_s r1,[r3,1]
+ stb_s r1,[r3]
+ j_s [blink]
+ENDFUNC (memset)
+#endif /* __ARC601__ || (!__Xbarrel_shifter && !__HS__) */
+
+#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
diff --git a/newlib/libc/machine/arc/setjmp.S b/newlib/libc/machine/arc/setjmp.S
new file mode 100644
index 0000000..57db0d7
--- /dev/null
+++ b/newlib/libc/machine/arc/setjmp.S
@@ -0,0 +1,165 @@
+/*
+ Copyright (c) 2015, Synopsys, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2) Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3) Neither the name of the Synopsys, Inc., nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/* ABI interface file
+ these are the stack mappings for the registers
+ as stored in the ABI for ARC */
+
+ .file "setjmp.S"
+
+ABIr13 = 0
+ABIr14 = ABIr13 + 4
+ABIr15 = ABIr14 + 4
+ABIr16 = ABIr15 + 4
+ABIr17 = ABIr16 + 4
+ABIr18 = ABIr17 + 4
+ABIr19 = ABIr18 + 4
+ABIr20 = ABIr19 + 4
+ABIr21 = ABIr20 + 4
+ABIr22 = ABIr21 + 4
+ABIr23 = ABIr22 + 4
+ABIr24 = ABIr23 + 4
+ABIr25 = ABIr24 + 4
+ABIr26 = ABIr25 + 4
+ABIr27 = ABIr26 + 4
+ABIr28 = ABIr27 + 4
+ABIr29 = ABIr28 + 4
+ABIr30 = ABIr29 + 4
+ABIr31 = ABIr30 + 4
+ABIlpc = ABIr31 + 4
+ABIlps = ABIlpc + 4
+ABIlpe = ABIlps + 4
+
+ABIflg = ABIlpe + 4
+ABImlo = ABIflg + 4
+ABImhi = ABImlo + 4
+
+ .text
+ .align 4
+ .global setjmp
+ .type setjmp,@function
+setjmp:
+ st r13, [r0, ABIr13]
+ st r14, [r0, ABIr14]
+ st r15, [r0, ABIr15]
+ st r16, [r0, ABIr16]
+ st r17, [r0, ABIr17]
+ st r18, [r0, ABIr18]
+ st r19, [r0, ABIr19]
+ st r20, [r0, ABIr20]
+ st r21, [r0, ABIr21]
+ st r22, [r0, ABIr22]
+ st r23, [r0, ABIr23]
+ st r24, [r0, ABIr24]
+ st r25, [r0, ABIr25]
+ st r26, [r0, ABIr26]
+ st r27, [r0, ABIr27]
+ st r28, [r0, ABIr28]
+ st r29, [r0, ABIr29]
+ st r30, [r0, ABIr30]
+ st blink, [r0, ABIr31]
+ st lp_count, [r0, ABIlpc]
+
+ lr r2, [lp_start]
+ lr r3, [lp_end]
+ st r2, [r0, ABIlps]
+ st r3, [r0, ABIlpe]
+
+#if (!defined (__A7__) && !defined (__EM__) && !defined (__HS__))
+; Till the configure changes are decided, and implemented, the code working on
+; mlo/mhi and using mul64 should be disabled.
+; st mlo, [r0, ABImlo]
+; st mhi, [r0, ABImhi]
+ lr r2, [status32]
+ st r2, [r0, ABIflg]
+#endif
+
+ j.d [blink]
+ mov r0,0
+.Lfe1:
+ .size setjmp,.Lfe1-setjmp
+
+ .align 4
+ .global longjmp
+ .type longjmp,@function
+longjmp:
+
+ ; load registers
+ ld r13, [r0, ABIr13]
+ ld r14, [r0, ABIr14]
+ ld r15, [r0, ABIr15]
+ ld r16, [r0, ABIr16]
+ ld r17, [r0, ABIr17]
+ ld r18, [r0, ABIr18]
+ ld r19, [r0, ABIr19]
+ ld r20, [r0, ABIr20]
+ ld r21, [r0, ABIr21]
+ ld r22, [r0, ABIr22]
+ ld r23, [r0, ABIr23]
+ ld r24, [r0, ABIr24]
+ ld r25, [r0, ABIr25]
+ ld r26, [r0, ABIr26]
+ ld r27, [r0, ABIr27]
+ ld r28, [r0, ABIr28]
+
+ ld r3, [r0, ABIr29]
+ mov r29, r3
+
+ ld r3, [r0, ABIr30]
+ mov r30, r3
+
+ ld blink, [r0, ABIr31]
+
+ ld r3, [r0, ABIlpc]
+ mov lp_count, r3
+
+ ld r2, [r0, ABIlps]
+ ld r3, [r0, ABIlpe]
+ sr r2, [lp_start]
+ sr r3, [lp_end]
+
+#if (!defined (__A7__) && !defined (__EM__) && !defined (__HS__))
+ ld r2, [r0, ABImlo]
+ ld r3, [r0, ABImhi]
+; We do not support restoring of mulhi and mlo registers, yet.
+
+; mulu64 0,r2,1 ; restores mlo
+; mov 0,mlo ; force multiply to finish
+; sr r3, [mulhi]
+ ld r2, [r0, ABIflg]
+ flag r2 ; restore "status32" register
+#endif
+
+ mov.f r1, r1 ; to avoid return 0 from longjmp
+ mov.eq r1, 1
+ j.d [blink]
+ mov r0,r1
+.Lfe2:
+ .size longjmp,.Lfe2-longjmp
diff --git a/newlib/libc/machine/configure b/newlib/libc/machine/configure
index 59c0789..89ea11e 100755
diff --git a/newlib/libc/machine/configure.in b/newlib/libc/machine/configure.in
index 1499eab..25dedba 100644
--- a/newlib/libc/machine/configure.in
+++ b/newlib/libc/machine/configure.in
@@ -25,6 +25,7 @@ if test -n "${machine_dir}"; then
case ${machine_dir} in
a29k) AC_CONFIG_SUBDIRS(a29k) ;;
aarch64) AC_CONFIG_SUBDIRS(aarch64) ;;
+ arc) AC_CONFIG_SUBDIRS(arc) ;;
arm) AC_CONFIG_SUBDIRS(arm) ;;
bfin) AC_CONFIG_SUBDIRS(bfin) ;;
cr16) AC_CONFIG_SUBDIRS(cr16) ;;
--
2.4.2