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Re: ARM: Clear icache when creating a closure
- From: "Joseph S. Myers" <joseph at codesourcery dot com>
- To: Andrew Haley <aph at redhat dot com>
- Cc: Richard Earnshaw <rearnsha at arm dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>, "libffi-discuss at sourceware dot org" <libffi-discuss at sourceware dot org>
- Date: Thu, 21 Jul 2011 15:33:56 +0000 (UTC)
- Subject: Re: ARM: Clear icache when creating a closure
- References: <4E1B2384.5080001@redhat.com> <4E1C0FEA.4040209@arm.com> <4E1C10CF.6020201@redhat.com>
On Tue, 12 Jul 2011, Andrew Haley wrote:
> >> *(unsigned int*) &__tramp[0] = 0xe92d000f; /* stmfd sp!, {r0-r3} */ \
> >> *(unsigned int*) &__tramp[4] = 0xe59f0000; /* ldr r0, [pc] */ \
> >> *(unsigned int*) &__tramp[8] = 0xe59ff000; /* ldr pc, [pc] */ \
> > Your patch looks sane, but I'll observe here that the poking of
> > instruction values is wrong on cores that run in BE-8 mode (where
> > instructions are always little-endian).
>
> Oh dear. How would one test for BE-8 mode on a Linux system?
My suggestion would be putting the instruction sequence in a .s file,
rather than hardcoding the instruction encodings here, and writing the
code to read from the sequence as assembled by the assembler. That way it
will have the appropriate mapping symbols to mark it as ARM-mode code and
the linker will deal with adjusting endianness, so you don't need to test
for BE-8 at all.
--
Joseph S. Myers
joseph@codesourcery.com