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Re: ARM: Clear icache when creating a closure


On Tue, 12 Jul 2011, Andrew Haley wrote:

> >>     *(unsigned int*) &__tramp[0] = 0xe92d000f; /* stmfd sp!, {r0-r3} */ \
> >>     *(unsigned int*) &__tramp[4] = 0xe59f0000; /* ldr r0, [pc] */       \
> >>     *(unsigned int*) &__tramp[8] = 0xe59ff000; /* ldr pc, [pc] */       \

> > Your patch looks sane, but I'll observe here that the poking of
> > instruction values is wrong on cores that run in BE-8 mode (where
> > instructions are always little-endian).
> 
> Oh dear.  How would one test for BE-8 mode on a Linux system?

My suggestion would be putting the instruction sequence in a .s file, 
rather than hardcoding the instruction encodings here, and writing the 
code to read from the sequence as assembled by the assembler.  That way it 
will have the appropriate mapping symbols to mark it as ARM-mode code and 
the linker will deal with adjusting endianness, so you don't need to test 
for BE-8 at all.

-- 
Joseph S. Myers
joseph@codesourcery.com


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