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Re: [PATCH] sysdeps/arm/armv7/multiarch/memcpy_impl.S: Improve performance.
- From: OndÅej BÃlka <neleai at seznam dot cz>
- To: "Ryan S. Arnold" <ryan dot arnold at gmail dot com>
- Cc: Carlos O'Donell <carlos at redhat dot com>, Will Newton <will dot newton at linaro dot org>, "libc-ports at sourceware dot org" <libc-ports at sourceware dot org>, Patch Tracking <patches at linaro dot org>, Siddhesh Poyarekar <siddhesh at redhat dot com>
- Date: Wed, 4 Sep 2013 01:29:18 +0200
- Subject: Re: [PATCH] sysdeps/arm/armv7/multiarch/memcpy_impl.S: Improve performance.
- Authentication-results: sourceware.org; auth=none
- References: <520894D5 dot 7060207 at linaro dot org> <CANu=DmiBHoymFKTvaW_VsdhWZEYwkfViz1tTeRgj7H80f0FntA at mail dot gmail dot com> <5220D30B dot 9080306 at redhat dot com> <CANu=DmiXLL9v1Z1KS0sBOs-pL8csEUGc9YE829_-tidKd-GruQ at mail dot gmail dot com> <5220F1F0 dot 80501 at redhat dot com> <CANu=DmhA9QvSe6RS72Db2P=yyjC72fsE8d4QZKHEcNiwqxNMvw at mail dot gmail dot com> <52260BD0 dot 6090805 at redhat dot com> <CAAKybw99YcSoyU58w2iqHGRTQpajAtKX6JZp=r57bT37fjvQ2Q at mail dot gmail dot com> <52263E63 dot 2080301 at redhat dot com> <CAAKybw_7VE3zYM1Vb4sfE-HRMMdCx2E9Obf45_11=bGjVZXeJQ at mail dot gmail dot com>
On Tue, Sep 03, 2013 at 03:56:29PM -0500, Ryan S. Arnold wrote:
> On Tue, Sep 3, 2013 at 2:54 PM, Carlos O'Donell <firstname.lastname@example.org> wrote:
> > The current set of performance preconditions are baked into the experience
> > of the core developers reviewing patches. I want the experts out of the
> > loop.
> This is the clutch.
> Developers working for the CPU manufacturers are privy to a lot of
> unpublished timing, penalty/hazard information, as well as proprietary
> pipeline analysis tools.
One problem of those on x64 is how much are these informations complete.
At least based on reading AMD optimization manuals around half of advices
is inaccurate so I need to check if they hold anyway.
> > At present we've split the performance intensive (or so we believe)
> > routines on a per-machine basis. The arguments are then going to be
> > had only on a per-machine basis, and even then for each hardware
> > variant can have an IFUNC resolver select the right routine at
> > runtime.
> Right, selecting the right variant with IFUNC has certainly helped
> platforms that didn't use optimized libraries. This is the low
> hanging fruit. So now our concern is the proliferation of micro-tuned
> variants and a lack of qualified eyes to objectively review the
Not there yet, at least for AMD, where its often using ifunc to select
slowest implementation. When you look at x64 benchmarks relation between
asymptoticaly best and selected implementation is quite random.
> > Then we come upon the tunables that should allow some dynamic adjustment
> > of an algorithm based on realtime data.
> Yes, you can do this with tunables if the developer knows something
> about the data (more about that later).
> >> I've run into situations where I recommended that a customer code
> >> their own string function implementation because they continually
> >> encountered unaligned-data when copying-by-value in C++ functions and
> >> PowerPC's string function implementations penalized unaligned copies
> >> in preference for aligned copies.
> > Provide both in glibc and expose a tunable?
> So do we (the glibc community) no longer consider the proliferation of
> tunables to be a mortal sin? Or was that only with regard to
> configuration options? Regardless, it still burdens the Linux
> distributions and developers who have to provide QA.
> If tunables are available, then trial-and-error would help where a
> user doesn't know the particulars of his application's data usage.
Here auto-tuning as described in other mail would give better result.
Unless there data usage would not fit any of our variants in which case
a custom routine would be needed.
> Using tunables is potentially problematic as well. Often testing a
> condition in highly optimized code is enough to obviate the
> performance benefit you're attempting to provide. Checking for feature
> availability might consume enough cycles to make it senseless to use
> the facility itself. I believe this is what happened in the early
> days trying to use VMX in string routines.
> Additionally, while dynamically linked applications won't suffer from
> using IFUNC resolved functions (because of mandatory PLT usage), glibc
> internal usage of IFUNC resolved functions very likely will if/when
> forced to go through the PLT, especially on systems like PowerPC where
> indirect branching is more expensive than direct branching. When
> Adhemerval's PowerPC IFUNC patches go in I'll probably argue for
> keeping a 'generic' optimized version for internal libc usage. We'll
> see how it all works together.
Those that are concerned about getting each bit of performance would
recompile everything with --march=target anyway. It would be nice to
select internal version based on --march.
> So using tunables alone isn't necessarily a win unless it's coupled
> with IFUNC. But using IFUNC also isn't a guaranteed win in all cases.
> For external usage, Using IFUNC in combination with a tunable should
> be beneficial. For instance, on systems that don't have a concrete
> cacheline size (e.g., the A2 processor), at process initialization we
> query the system cacheline size, populate a static with the size, and
> then the string routines will query that size at runtime. It'd be
> nice to do that query at initialization and then pre-select an
> implementation based on cacheline size so we don't have to test for
> the cacheline size each time through the string function.
> This of course increases the cost of maintaining the string routines
> by having myriad of combinations.
> These are all the trade-offs we weigh.