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Re: benchmark improvements (Was: Re: [PATCH] sysdeps/arm/armv7/multiarch/memcpy_impl.S: Improve performance.)

On Tue, Sep 03, 2013 at 02:46:13PM +0100, Will Newton wrote:
> On 2 September 2013 15:20, Siddhesh Poyarekar <> wrote:
> >> The glibc benchmarks also have some other weaknesses that should
> >> really be addressed, hopefully I'll have some time to write patches
> >> for some of this work.
> >
> > I know Ondrej had proposed a few improvements as well.  I'd like to
> > see those reposted so that we can look at it and if possible, have
> > them merged in.
> I already have a patch to do multiple runs of benchmarks  - some
> things like physical page allocation that can impact a benchmark can
> only be controlled for this way. As I mentioned above I'd also like to
> get graphing capability in there too. Beyond that it would be nice to
> have a look at the various sizes and alignments used and make sure
> there is a reasonably complete set, and to make sure the tests are run
> for a useful number of iterations (not too large or too small).
For alignments do you want existing implementation to take

a) 0.031s b) 0.080s c) 0.036s

If you want to get your implementation accepted pick a), if you do not
like ACME implementation pick b), otherwise pick c). 

I got those numbers by 'benchmarking' memchr with alignment 15 and size
15 on ivy bridge. (benchmark attached.) 

Current memchr implementation has separate branches for loads that cross
cache line and those that don't. For a) addresses are of form 64*x+15,
for b) 64*x+63, and for c) 16*x+15.

Attachment: memchr.tar.bz2
Description: Binary data

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