This is the mail archive of the
libc-alpha@sourceware.org
mailing list for the glibc project.
[PATCH 0/3] x86: Add support for Zhaoxin processors
- From: MayShao <MayShao at zhaoxin dot com>
- To: <libc-alpha at sourceware dot org>
- Cc: <carlos at redhat dot com>, <CooperYan at zhaoxin dot com>, <QiyuanWang at zhaoxin dot com>, <HerryYang at zhaoxin dot com>, <RickyLi at zhaoxin dot com>
- Date: Mon, 9 Dec 2019 11:29:32 +0800
- Subject: [PATCH 0/3] x86: Add support for Zhaoxin processors
This patch series fix Shanghai Zhaoxin processor CPU Vendor ID detection
problem in glibc sysdep module. Current glibc doesn't recognize Zhaoxin
CPU Vendor ID("CentaurHauls" and "Shanghai") and set kind to
arch_kind_other. These lead to incorrect result of __cache_sysconf(),
incorrect value for variables like __x86_shared_cache_size, and fail
of test case tst-get-cpu-features.
Background:
Shanghai Zhaoxin Semiconductor Co., Ltd("Zhaoxin"), established in 2013,
headquartered in Zhangjiang, Shanghai, China. Zhaoxin aims at providing
general-purpose x86 processors.
Related Zhaoxin Linux Kernel patch can be found at
https://lore.kernel.org/lkml/01042674b2f741b2aed1f797359bdffb@zhaoxin.com
MayShao (3):
x86: Add CPU Vendor ID detection support for Zhaoxin processors
x86: Add cache information support for Zhaoxin processors
x86: Add the test case of __get_cpu_features support for Zhaoxin
processors
sysdeps/x86/cacheinfo.c | 183 +++++++++++++++++++++++++++++++++++++
sysdeps/x86/cpu-features.c | 59 ++++++++++++
sysdeps/x86/cpu-features.h | 1 +
sysdeps/x86/tst-get-cpu-features.c | 2 +
4 files changed, 245 insertions(+)
--
2.7.4
保密声明:
本邮件含有保密或专有信息,仅供指定收件人使用。严禁对本邮件或其内容做任何未经授权的查阅、使用、复制或转发。
CONFIDENTIAL NOTE:
This email contains confidential or legally privileged information and is for the sole use of its intended recipient. Any unauthorized review, use, copying or forwarding of this email or the content of this email is strictly prohibited.