This is the mail archive of the
libc-alpha@sourceware.org
mailing list for the glibc project.
Re: RFD - Support for memory tagging in GLIBC
- From: Florian Weimer <fweimer at redhat dot com>
- To: DJ Delorie <dj at redhat dot com>
- Cc: "Richard Earnshaw \(lists\)" <Richard dot Earnshaw at arm dot com>, libc-alpha at sourceware dot org
- Date: Tue, 10 Sep 2019 17:57:38 +0200
- Subject: Re: RFD - Support for memory tagging in GLIBC
- References: <xnftl5i8tc.fsf@greed.delorie.com>
* DJ Delorie:
> I wonder if we could generically abuse these bits on other architectures
> as well, but as a no-op? It might require some platform-independent
> kernel interface to say "I want my address space to ignore the top four
> bits please".
You can get hardware support for this using alias mappings, but it's
going to be some bits in the middle, not the top bits, and you'll
probably waste TLB slots. OpenJDK's ZGC does this even on aarch64
because as mentioned on this thread, the system calls currently expect
the canonical bits.
Thanks,
Florian