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Re: [PATCH] aarch64: Add tunable glibc.memset.dc_zva_threshold
- From: Siddhesh Poyarekar <siddhesh at gotplt dot org>
- To: Feng Xue OS <fxue at os dot amperecomputing dot com>, "libc-alpha at sourceware dot org" <libc-alpha at sourceware dot org>
- Date: Fri, 2 Aug 2019 08:37:27 +0530
- Subject: Re: [PATCH] aarch64: Add tunable glibc.memset.dc_zva_threshold
- References: <BYAPR01MB4869B921E04ECAEF4264B926F7C00@BYAPR01MB4869.prod.exchangelabs.com> <f36f2937-f638-3883-aca6-db627c4592ba@gotplt.org> <BYAPR01MB4869BD56BBD7F8C2D671E5A4F7D90@BYAPR01MB4869.prod.exchangelabs.com>
On 02/08/19 7:19 AM, Feng Xue OS wrote:
> For SPEC2017 502.gcc_r (rate=32), which uses quite a few memsets, we can get 2.3%
> improvement on emag processor if DC ZVA threshold is changed from 512 to 8M.
That's great, can you test for another part too? Making a case for a
tunable is easier if you can show applicability to a larger set of
processors.
>> This should be called cache.aarch64_dc_zva_threshold or
>> cache.aarch64_dczva_threshold.
> I think dc_zva implies aarch64 architecture, so the name "cache.dc_zva_threshold"
> seems to be concise a little bit.
It's not just about whether the meaning is clear, it is about naming
convention. Not having an architecture name in the tunable implies that
it could be generally applicable.
Siddhesh