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Re: [PATCH 19/28] powerpc: Refactor powerpc32 lrint/lrintf/llrint/llrintf
- From: "Gabriel F. T. Gomes" <gabriel at inconstante dot eti dot br>
- To: Adhemerval Zanella <adhemerval dot zanella at linaro dot org>
- Cc: <libc-alpha at sourceware dot org>
- Date: Fri, 14 Jun 2019 15:34:39 -0300
- Subject: Re: [PATCH 19/28] powerpc: Refactor powerpc32 lrint/lrintf/llrint/llrintf
- References: <20190329133529.22523-1-adhemerval.zanella@linaro.org> <20190329133529.22523-20-adhemerval.zanella@linaro.org>
On Fri, Mar 29 2019, Adhemerval Zanella wrote:
> This patches consolidates all the powerpc llrint{f} implementations on
> the generic sysdeps/powerpc/powerpc32/fpu/s_llrint{f}. The only missing
> optimization is the power6x one which I could not make GCC generates
> mftgpr for 32 bits output.
I see, and such optimization was never implemented anyway, so no harm done.
The patch looks good to me. Thanks.
Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>
> +++ b/sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_llrint-power6.c
> @@ -0,0 +1,2 @@
> +#define __llrint __llrint_power6
> +#include <sysdeps/powerpc/powerpc32/fpu/s_llrint.c>
>
> [...]
>
> +++ b/sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_llrint-ppc32.c
> @@ -0,0 +1,2 @@
> +#define __llrint __llrint_ppc32
> +#include <sysdeps/powerpc/powerpc32/fpu/s_llrint.c>
00079d80 <__llrint_power6>:
79d80: 94 21 ff f0 stwu r1,-16(r1)
79d84: fc 20 0e 5c fctid f1,f1
79d88: d8 21 00 08 stfd f1,8(r1)
79d8c: 80 61 00 08 lwz r3,8(r1)
79d90: 80 81 00 0c lwz r4,12(r1)
79d94: 38 21 00 10 addi r1,r1,16
79d98: 4e 80 00 20 blr
00079da0 <__llrint_ppc32>:
79da0: 94 21 ff f0 stwu r1,-16(r1)
79da4: fc 20 0e 5c fctid f1,f1
79da8: d8 21 00 08 stfd f1,8(r1)
-> 79dac: 60 00 00 00 nop
79db0: 80 61 00 08 lwz r3,8(r1)
79db4: 80 81 00 0c lwz r4,12(r1)
79db8: 38 21 00 10 addi r1,r1,16
79dbc: 4e 80 00 20 blr
> -ENTRY (__llrint)
> - CALL_MCOUNT
> - stwu r1,-16(r1)
> - cfi_adjust_cfa_offset (16)
> - fctid fp13,fp1
> - stfd fp13,8(r1)
> - nop /* Insure the following load is in a different dispatch group */
> - nop /* to avoid pipe stall on POWER4&5. */
> - nop
> - lwz r3,8+HIWORD(r1)
> - lwz r4,8+LOWORD(r1)
> - addi r1,r1,16
> - blr
> - END (__llrint)
OK.