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Re: [PATCH v3 2/12] PPC64: Add libmvec SIMD single-precision cosine function.


GT <tnggil@protonmail.com> writes:

> [BZ #24205]
>
> Implements single-precision cosine using VSX vector capability. The polynomial
> cosine-approximating algorithm is adapted for PPC64 from x86_64 [commit #04f496d602].
>
> The patch has been tested on PPC64/POWER8 Little Endian and Big Endian. It is
> tested using the framework created for libmvec on x86_64 which runs tests on
> issuing 'make check'. Tests of the new vector cosine function all pass.
>
> Details on the ABI are found at this link:
> <https://sourceware.org/glibc/wiki/
> libmvec?action=AttachFile&do=view&target=VectorABI.txt>
>
> But for adjusting the width of operands, details described for the
> double-precision cosine implemented earlier apply here. See git
> commit #7956c29f07 for that information.
> ---
>  ChangeLog                                     |  15 +++
>  NEWS                                          |  10 +-
>  sysdeps/powerpc/fpu/libm-test-ulps            |   3 +
>  sysdeps/powerpc/powerpc64/fpu/Versions        |   2 +-
>  .../powerpc/powerpc64/fpu/multiarch/Makefile  |  10 +-
>  .../fpu/multiarch/test-float-vlen4-wrappers.c |  24 ++++
>  .../powerpc64/fpu/multiarch/vec_s_cosf4_vsx.c | 109 ++++++++++++++++++
>  .../powerpc64/fpu/multiarch/vec_s_trig_data.h |  72 ++++++++++++
>  .../linux/powerpc/powerpc64/libmvec.abilist   |   1 +
>  9 files changed, 241 insertions(+), 5 deletions(-)
>  create mode 100644 sysdeps/powerpc/powerpc64/fpu/multiarch/test-float-vlen4-wrappers.c
>  create mode 100644 sysdeps/powerpc/powerpc64/fpu/multiarch/vec_s_cosf4_vsx.c
>  create mode 100644 sysdeps/powerpc/powerpc64/fpu/multiarch/vec_s_trig_data.h
>
> diff --git a/ChangeLog b/ChangeLog
> index efe4253f6d..1d6636b8fb 100644
> --- a/ChangeLog
> +++ b/ChangeLog
> @@ -1,3 +1,18 @@
> +2019-04-03  Bert Tenjy  <bert.tenjy@gmail.com>
> +
> +       [BZ #24205]
> +       * NEWS: Note the addition of PPC64 vector cosf.
> +       * sysdeps/powerpc/fpu/libm-test-ulps: Regenerated.
> +       * sysdeps/powerpc/powerpc64/fpu/Versions: Added new cosf entry.
> +       * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile: (libmvec-sysdep_routines)
> +       (CFLAGS-vec_s_cosf4_vsx.c, libmvec-tests, float-vlen4-funcs)
> +       (float-vlen4-arch-ext-cflags): Added build of VSX SIMD cosf function
> +       and its tests.
> +       * sysdeps/powerpc/powerpc64/fpu/multiarch/test-float-vlen4-wrappers.c: New file.
> +       * sysdeps/powerpc/powerpc64/fpu/multiarch/vec_s_cosf4_vsx.c: New file.
> +       * sysdeps/powerpc/powerpc64/fpu/multiarch/vec_s_trig_data.h: Likewise.
> +       * sysdeps/unix/sysv/linux/powerpc/powerpc64/libmvec.abilist: New SIMD cosf added.

Changelog entries should be indented with tabs.
The ChangeLog should not be part of the diff either.

More information here:
https://sourceware.org/glibc/wiki/Contribution%20checklist#Properly_Formatted_GNU_ChangeLog

Fixed these and merged into branch tuliom/libmvec.

Thanks!

-- 
Tulio Magno


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