This v7 patch set contains what I think should be an acceptable glibc port for
64-bit RISC-V systems. We've gotten some tenative approval for the v6 with
changes, but I wanted to send another patch set out just to make sure everyone
is on the same page. The test suite is in roughly the same shape as it was
last night, with the only expected difference being a handful of fixed test
cases resulting from adding ipc_priv.h. I've added Darius, Andrew, DJ, and
myself as maintainers on the wiki and have updated most of the relevant pages.
Darius has wiki access and will post the full test suite results as they come
in. Some preliminary results are on the wiki now. This passes
build-many-glibcs.py (with the listed modifications in the patch to add our
targets) and doesn't regress on the test suite (for my admittedly limited
qemu-user testing) for any of the targets.
The one wrinkle here is that our Linux port doesn't land in a tarball until
4.15. I'd be OK holding off until 4.15 is released (which will ideally be this
Sunday), or submiting a follow-on patch to bump the Linux headers to 4.15 after
merging this. I ran a full build-many-glibcs.py with an Linux headers from an
earlier 4.15 RC (I think maybe rc3), but I haven't run one since then. I've
kicked off the build but it'll take a while.
Thanks, again, to everyone who has helped review our port!
The full log of changes since the v6 port is:
* We now have an ipc_priv.h
* System call errors negate a0.
* There's a soft-float libm-test-ulps file.
* The __riscv_flen #ifs around EXCEPTION_TESTS and ROUNDING_TESTS go the right
way.
* The comment in flush-icache.c has been corrected.
* We use '.section .init_array,"a",%init_array' in crti.S.
* crti.S no longer includes sys/asm.h.
* The last remaining (as far as I know) ilp32/ilp32d references have been removed .
* I've added mechanical ChangeLog entries to all the commits that just add new
files (the other commits already had entries).
[v6] This v6 patch set is largely the same as the v5 patch set I submitted
yesterday, but with the following changes:
* We're now more explicit about the targets we support, which are
rv64imac/lp64, rv64imafdc/lp64, and rv64imafdc/lp64d (rv64gc is an alias for
rv64imafdc, and while I've tried to be consistent in the commits I might have
confused them a handful of times on the mailing list in conversation).
* All mentions of the rv32i-based port have been removed, including removing
all the rv32 folders.
* The ABI lists are listed as rv64 specific, we'll be targeting glibc-2.28 for
rv32 support.
* build-many-glibcs.py now builds three non-multilib GCCs for RISC-V, each of
which builds one of the supported targets.
* Our crti.S has been merged into sysdeps/init_array.
* The soft float test support macros has been fixed.
* The check for RVC has been removed, which I forgot about some how.
* sysdep-cancel.h has been removed as it's obselete.
* Some whitespace changes.
[v5] A short log of the changes since our v4 includes
* A proper implementation of lroundf on rv64.
* Moving back to a nofpu directory, which got eaten by a previous patch set.
* Support for dl-cache.
* Many comment and whitespace fixes.
* Better documentation of __riscv_flush_icache, along with some namespace
cleanups.
* We now call the exit system call instead of _exit after a thread terminates.
* Correct handling of S1 and S2 in ucontext-related code.
* Correct SP handling when arguments are on the stack in ucontext-related code.
* Correctly saving sigmask on setcontext.
* We now test for floating-point exceptions.
[v4] A highlight of the changes since our v3 includes:
* Some ABI list cleanups, to match a few changes between when we last rebased
and now.
* ucontext.h namespace fixes.
* Copyright year has been updated to 2018, and "contributed by" lines have been
removed.
* int in specified in all places were optional.
* The floating-point support no longer uses ABI types, but uses explicit bit
widths.
* Some floating point test macros have been defined to inform the test suite
how our ISA operates.
* We now examine the ELF flags.
* I've added ChangeLog entries for all the commits except those that just add
new files.
[v3] Here's a summary of the changes since the previous patch set:
* We now have 4 ABI/ISA pairs in build-many-glibcs.py, which is clean (with the
newest linux headers, see the patch for details).
* Support for ilp32f and lp64f have been removed.
* Support for systems without the A extension has been removed.
* There are now ABI lists.
* Many whitespace fixes to meet glibc's standards.
* Included C and ASM files from other ports have been copied into ours.
* with_fp_cond is now set, but I don't have a soft-fp directory yet.
* We no longer maintain a -mno-plt list in our port, that existed to work
around a linker bug and is now defunct.
* A handful of header files (mostly ucontext.h) have been cleaned up to be
namespace clean.
[v2] A (very brief, as it's been 6 months) summary of the changes since the v1
patch set includes:
* Many copyright cleanups.
* We're using the generic versions of a handful of functions and headers,
including ieee754.h, mathdef.h mathinline.h, fabs{,f}, and
fe{disable,enable,get}except.
* Removal of lots of head code, including pthread_lock, atomic_fast.
* A handful of ABI fixes to match our upstreamed Linux port, including
sigcontext, instruction-cache flushing, and some syscall sanitization.
* We've changed to use libm_alias_{float,double}, like upstream
* Compiler builtins are used for atomics where possible.
* We now mandate the A extension in Linux, support for non-A systems has been
removed from glibc.
[PATCH v7 01/17] sysdeps/init_array: Add PREINIT_FUNCTION to crti.S
[PATCH v7 02/17] Skeleton documentation for the RISC-V port
[PATCH v7 03/17] Add RISC-V entries to config.h.in
[PATCH v7 04/17] Add documentation for __riscv_flush_icache
[PATCH v7 05/17] RISC-V: ABI Implementation
[PATCH v7 06/17] RISC-V: Startup and Dynamic Loading Code
[PATCH v7 07/17] RISC-V: Thread-Local Storage Support
[PATCH v7 08/17] RISC-V: Generic <math.h> and soft-fp Routines
[PATCH v7 09/17] RISC-V: Hard Float Support
[PATCH v7 10/17] RISC-V: Atomic and Locking Routines
[PATCH v7 11/17] RISC-V: Linux Syscall Interface
[PATCH v7 12/17] RISC-V: Linux ABI
[PATCH v7 13/17] RISC-V: Linux Startup and Dynamic Loading Code
[PATCH v7 14/17] RISC-V: Add ABI Lists
[PATCH v7 15/17] RISC-V: Build Infastructure
[PATCH v7 16/17] Add RISC-V to build-many-glibcs.py
[PATCH v7 17/17] RISC-V: Add ipc_priv.h