This is the mail archive of the
libc-alpha@sourceware.org
mailing list for the glibc project.
Re: [PATCH 1/3] Guess L1 cache linesize for aarch64
- From: Szabolcs Nagy <szabolcs dot nagy at arm dot com>
- To: Richard Henderson <rth at twiddle dot net>, libc-alpha at sourceware dot org
- Cc: nd at arm dot com, Marcus Shawcroft <marcus dot shawcroft at arm dot com>
- Date: Tue, 10 Oct 2017 18:19:25 +0100
- Subject: Re: [PATCH 1/3] Guess L1 cache linesize for aarch64
- Authentication-results: sourceware.org; auth=none
- Authentication-results: spf=none (sender IP is ) smtp.mailfrom=Szabolcs dot Nagy at arm dot com;
- Nodisclaimer: True
- References: <20170608225728.26779-1-rth@twiddle.net> <20170608225728.26779-2-rth@twiddle.net>
- Spamdiagnosticmetadata: NSPM
- Spamdiagnosticoutput: 1:99
On 08/06/17 23:57, Richard Henderson wrote:
> Using the cache hierarchy linesize minimum in CTR_EL0.
> See the comment within the code for rationale.
>
> * sysdeps/unix/sysv/linux/aarch64/sysconf.c: New file.
OK.