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Re: Synchronizing auxiliary mutex data
On Wed, 21 Jun 2017, Andreas Schwab wrote:
> On Jun 21 2017, Alexander Monakov <email@example.com> wrote:
> > No, not at all: it only means that the CPU doesn't reorder the operations (so
> > the cache subsystem receives the requests in the same order they were in the
> > original program), and the cache subsystem serves them in that same order.
> But how does it get to know that the actual value in memory has been
> changed be another cpu?
Cache coherency protocol ensures that when another CPU prepares to write to
memory, we lose posession of a copy of about-to-be-overwritten data in our cache.